
S1C88409 TECHNICAL MANUAL
EPSON
17
CHAPTER 3: CPU AND MEMORY
Expanded 4M maximum mode
The expanded 4M maximum mode should be
set when 64KB–4MB
× 3 of external memory is
expanded to the S1C88409. This mode can be
set regardless of the MCU/MPU mode setting.
In the MCU mode, the internal ROM is used.
External memory can be assigned to the area
from 400000H to FFFFFFH in the MCU/
expanded 4M maximum mode.
In the MPU mode, the internal ROM area is
released to the external memory. Thus, external
memory can be assigned to the area from
000000H to BFFFFFH in the MPU/expanded
4M maximum mode.
However, the area from 00F000H to 00FFFFH is
assigned to the internal RAM and I/O memory,
therefore the area cannot be accessed as an
external memory.
This mode is equivalent to the Model 3/
maximum mode of the S1C88 core CPU.
Memory access is valid for the physical space
000000H to BFFFFFH in the MPU mode or
400000H to FFFFFFH + internal memory in the
MCU mode.
Program memory and data memory can be
assigned with an optional size (up to 4MB
× 3
together), so this mode is suitable for systems
with large-scale program and data capacity.
This mode outputs the chip enable (CE) signals
for the 4MB memory chip.
FFFFFFH
400000H
3FFFFFH
010000H
00FFFFH
00F000H
00EFFFH
002000H
001FFFH
000000H
BFFFFFH
Internal memory
Unused area
External memory
area
– MCU mode –
Internal memory
External memory
area
External memory
area
– MPU mode –
Fig. 3.5.2.4 Memory map for expanded 4M maximum mode
Refer to Section 5.2, "System Controller and Bus
Control", for setting the mode.
3.6 External Bus
The S1C88409 has bus terminals that can address a
maximum 4MB
× 3 external memory. Memory and
other devices can be expanded outside according
to the range of each bus mode shown in the
previous section.
S1C88409
External
Device
Address bus (A0–A21)
Data bus (D0–D7)
RD
WR
CE0
CE1
CE2
External
Device
External
Device
I/O
Fig. 3.6.1 External bus lines
The following explains the outline of the external
bus terminals. Refer to Section 5.2, "System
Controller and Bus Control", for controlling them.
3.6.1 Data bus
The S1C88409 has an 8-bit external data bus (D0–
D7). The terminals and I/O circuits of the data bus
D0–D7 are shared with the I/O port P00–P07, and
the function switches according to the bus mode
setting.
In the single chip mode, the 8-bit terminals are all
set as the I/O port terminals P00–P07 and in the
other expanded modes, they are set as the data bus
(D0–D7).
When the data bus is set, the data register and I/O
control register of the I/O port P00–P07 are
disconnected from the I/O circuit and can be used
as general purpose data registers with the ability
to read/write.
Each data bus line has a built-in pull-up resistor
that is activated during the input mode, and it can
be selected for use or not by the mask option.
I/O
port
Data
bus
P00
P01
P02
P03
P04
P05
P06
P07
D0
D1
D2
D3
D4
D5
D6
D7
64K
Single
chip
Bus mode
4M
(max.)
4M
(min.)
Bus mode
Fig. 3.6.1.1 Correspondence between data bus
and I/O port