
S1C88409 TECHNICAL MANUAL
EPSON
91
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (LCD Controller)
5.10.5 Display memory
The S1C88409 has a 3.75KB of RAM built-in and
the display memory is allocated in the RAM. The
display memory size can be selected from seven
types listed in Table 5.10.5.1 by mask option.
Table 5.10.5.1 Display memory size
Data memory
1792 bytes
00F800H–00FEFFH
1536 bytes
00F900H–00FEFFH
1280 bytes
00FA00H–00FEFFH
1024 bytes
00FB00H–00FEFFH
768 bytes
00FC00H–00FEFFH
512 bytes
00FD00H–00FEFFH
256 bytes
00FE00H–00FEFFH
Display memory
2048 bytes
00F000H–00F7FFH
2304 bytes
00F000H–00F8FFH
2560 bytes
00F000H–00F9FFH
2816 bytes
00F000H–00FAFFH
3072 bytes
00F000H–00FBFFH
3328 bytes
00F000H–00FCFFH
3584 bytes
00F000H–00FDFFH
1
2
3
4
5
6
7
Note: The display memory area configured by
mask option may be used as data memory.
However, the stack area cannot be as-
signed there.
The required display memory size is calculated by
the following expressions according to the LCD
panel size:
B&W LCD panel:
Memory size = (number of horizontal dots / 8)
×
Number of vertical dots
Gray-scale panel:
Memory size = (number of horizontal dots / 4)
×
Number of vertical dots
When using the vertical scroll function or virtual
screen function, the display memory size should
be increased for the scroll area or virtual area.
Use the LCD panel examples in Sections 5.10.6 to
5.10.8 as reference for deciding the memory size.
5.10.6 LCD panel
FR frequency
The FR (frame) signal is generated by dividing the
OSC1 clock. The dividing ratio can be selected
using the CKCN and POINT5 registers. Select one
according to the LCD panel to be used so that it is
not out of the permissible range.
Table 5.10.6.1 FR frequency setting
CKCN2
0
1
CKCN1
0
1
0
1
CKCN0
0
1
0
1
0
1
0
1
POINT5
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FR frequency
fOSC1/(SLT+1)
fOSC1/1.5/(SLT+1)
fOSC1/2/(SLT+1)
fOSC1/2.5/(SLT+1)
fOSC1/3/(SLT+1)
fOSC1/3.5/(SLT+1)
fOSC1/4/(SLT+1)
fOSC1/4.5/(SLT+1)
fOSC1/5/(SLT+1)
fOSC1/5.5/(SLT+1)
fOSC1/6/(SLT+1)
fOSC1/6.5/(SLT+1)
fOSC1/7/(SLT+1)
fOSC1/7.5/(SLT+1)
fOSC1/8/(SLT+1)
fOSC1/8.5/(SLT+1)
Setting the panel size
To correspond the display memory bits to the LCD
panel dots one to one, it is necessary to set the
LCD panel size in the LCD controller. The follow-
ing registers should be used for this setting.
LBC6–LBC0:
Sets the number of bytes for one
line of display data.
Specify [Number of horizontal
dots / 8] in the B&W mode or
[Number of horizontal dots / 4] in
the gray-scale mode.
SLT7–SLT0:
Sets the number of lines (number
of vertical dots) of the LCD panel.
SAD15–SAD0:
Sets the display start address in
the display memory.