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參數(shù)資料
| 型號： | S1C88409D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.8 MHz, MICROCONTROLLER, UUC108 |
| 封裝： | DIE-108 |
| 文件頁數(shù)： | 168/250頁 |
| 文件大?。?/td> | 1877K |
| 代理商： | S1C88409D |
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S1C88409 TECHNICAL MANUAL
EPSON
15
CHAPTER 3: CPU AND MEMORY
MCU mode...Set the MCU/MPU terminal
to HIGH (VDD)
The MCU mode should be set when using the
internal ROM. External memory can be ex-
panded to the addressable space except for the
internal memory area. Refer to Section 3.5.2,
"Bus mode", for the memory map.
In the MCU mode, an initial reset activates the
S1C88409 as a system with the internal
memory only. The internal ROM is allocated to
the top of the common area (logical space
0000H–7FFFH) in the program memory.
Exception processing vectors are assigned in
the internal ROM.
Furthermore, the application initial routine that
starts with reset exception processing must
likewise be written to the internal ROM. Bus
and other settings corresponding to the
expanded memory can be done by software.
This processing is executed in the initial
routine written in the internal ROM. The
external memory can be accessed after the bus
mode setting.
In this mode, accessing the internal memory
area does not output the chip enable (CE) or
the read (RD)/write (WR) signals to the
external memory, and it sets the data bus (D0–
D7) to high impedance status (or pull-up status
when the pull-up resistors for P00–P07 are
available by setting the mask option).
Consequently, the external memory addresses
that overlap with the internal memory are
invalid.
MPU mode...Set the MCU/MPU terminal
to LOW (VSS)
The MPU mode releases the internal ROM area
to an external memory, so the internal ROM
cannot be used. When this area is accessed, a
chip enable (CE) signal and a read (RD)/write
(WR) signal are output to the external memory
and the data bus (D0–D7) goes to active status.
Accessing other internal memory (RAM, I/O
memory) does not output these signals outside
of the IC.
In the MPU mode, the system is activated by
the external memory. Therefore, the initial
setting for the system configuration can be
selected with mask option so that the bus is set
according to the external memory at initial
reset. (See Section 3.5.2, "Bus mode".)
When setting this mode, the exception process-
ing vectors and the initial routine must be
assigned within the common area (000000H–
007FFFH).
The MCU/MPU terminal has a built-in pull-up
resistor, and it can be selected for use or not by
the mask option.
Note: The MCU/MPU terminal status is latched at
the rising edge of the RESET input signal.
Therefore, apply a low pulse to the RESET
terminal when switching the mode.
3.5.2 Bus mode
The S1C88409 has four kind of bus modes in order
to set the bus specification to match the configura-
tion of expanded external memory. The four bus
modes are as follows, and one of them can be
selected with software.
Single chip mode
The single chip mode should be set when using
the S1C88409 as a single chip microcomputer
without external memory expansion.
This mode is available only in the MCU mode
shown in the previous section because the
internal ROM is used. In the MPU mode, the
single chip mode cannot be set.
The single chip mode does not need an external
bus line. The terminals for the external bus can
be used as general-purpose output ports or I/O
ports. Accordingly, the output port consists of
30 bits and the I/O port consists of 28 bits.
This mode is equivalent to the Model 3/
minimum mode of the S1C88 core CPU.
Memory access is valid only for the internal
memory area within the physical space
000000H to 00FFFFH.
– MCU mode –
00FFFFH
00FF00H
00FEFFH
00F000H
I/O memory
RAM
(Display memory)
RAM
(Data memory)
00FFFFH
00F000H
00EFFFH
:
002000H
001FFFH
000000H
RAM, I/O memory
ROM (8K-byte)
Unused area
See Section 3.2.2, "RAM (Data Memory,
Display Memory)", for the capacity and
address of the RAM.
Fig. 3.5.2.1 Memory map for single chip mode
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