
104
EPSON
S1C88409 TECHNICAL MANUAL
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (Clock Timer)
5.11 Clock Timer
5.11.1 Configuration of clock timer
The S1C88409 has a built-in clock timer that uses
the OSC1 oscillation circuit as the clock source.
The clock timer is composed of an 8-bit binary
counter that inputs a 256 Hz clock divided from
fOSC1 and a 7-bit BCD counter for counting up to
60 seconds. The 128–1 Hz and 0–60 second counter
data can be read by software. The 60-second
counter can preset data.
Ordinarily, this clock timer is used for various
timing functions such as clocks.
Figure 5.11.1.1 shows the configuration of the clock
timer.
5.11.2 Interrupt function
The clock timer can generate an interrupt by each
of the 32 Hz, 8 Hz, 2 Hz and 1 Hz signals or when
the 60-second counter overflows.
Figure 5.11.2.1 shows the configuration of the clock
timer interrupt circuit.
The interrupt factor flags FCTM32, FCTM8,
FCTM2 and FCTM1 are set to "1" at the falling
edge of the 32 Hz, 8 Hz, 2 Hz and 1 Hz signals,
respectively. At that point, the interrupt is gener-
ated. When the 60-second counter overflows,
FT60S is set to "1" to generate the 60S interrupt.
The interrupt can also be prohibited by setting the
interrupt enable registers ECTM32, ECTM8,
ECTM2, ECTM1 and ET60S corresponding to the
interrupt factor flags.
Furthermore, the priority level of the input interrupt
for the CPU can be set in an optional level (0–3) using
the interrupt priority register PCTM (two bits).
Data bus
Interrupt
request
60S
Interrupt control circuit
Prescaler
64
Hz
32
Hz
16
Hz
8
Hz
4
Hz
2
Hz
1
Hz
128
Hz
1 sec
BCD
10 sec
BCD
Clock timer Run/Stop
TMRUN
Reset
Preset
TMRST
Clock timer
60-second
counter
TMD0~TMD7
TMMD0
~TMMD6
OSC1
oscillation
circuit
fOSC1
256 Hz
TMMDW
Writing data
to TMMD
Fig. 5.11.1.1 Configuration of clock timer
Data
bus
Interrupt
request
Address
32 Hz falling edge
Interrupt factor flag
FCTM32
Address
Interrupt enable
register ECTM32
Address
8 Hz falling edge
Interrupt factor flag
FCTM8
Address
Interrupt enable
register ECTM8
Address
2 Hz falling edge
Interrupt factor flag
FCTM2
Address
Interrupt enable
register ECTM2
Interrupt priority
level judgment
circuit
Address
Interrupt priority register
PCTM0, PCTM1
Address
1 Hz falling edge
Interrupt factor flag
FCTM1
Address
Interrupt enable
register ECTM1
Address
60S counter overflow
Interrupt factor flag
FT60S
Address
Interrupt enable
register ET60S
Fig. 5.11.2.1 Configuration of clock timer interrupt circuit