
S1C88409 TECHNICAL MANUAL
EPSON
145
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
Table 5.14.10.1(b) Serial interface control bits
Address
Function
R/W
Init
0
1
Comment
Name
Bit
00FF41
–
Serial I/F
framing error flag
Serial I/F
parity error flag
Serial I/F
overrun error flag
Serial I/F
receive trigger/status
Serial I/F receive enable
Serial I/F
transmit trigger/status
Serial I/F transmit enable
–
R
W
R
W
R
W
R
W
R/W
R
W
R/W
–
0
–
No error
Invalid
No error
Invalid
No error
Invalid
Stop
Invalid
Disable
Stop
Invalid
Disable
–
Error
Reset (0)
Error
Reset (0)
Error
Reset (0)
Run
Trigger
Enable
Run
Trigger
Enable
"0" when being read
–
FER
PER
OER
RXTRG
RXEN
TXTRG
TXEN
D7
D6
D5
D4
D3
D2
D1
D0
00FF42
Serial I/F
transmit/receive data register
R/W
×
Low
High
TRXD7 is invalid in
7-bit asynchronous
mode
TRXD7
TRXD6
TRXD5
TRXD4
TRXD3
TRXD2
TRXD1
TRXD0
D7
D6
D5
D4
D3
D2
D1
D0
D7(MSB)
D6
D5
D4
D3
D2
D1
D0(LSB)
00FF43
–
IrDA interface output logic inversion
IrDA interface input logic inversion
IrDA interface setting
–
R/W
–
0
–
Normal
–
Inverse
"0" when being read
Valid only when
SIOSEL = "1" in
asynchronous mode
–
IRTL
IRIL
IRST1
IRST0
D7
D6
D5
D4
D3
D2
D1
D0
IRST1
1
0
IRST0
1
0
1
0
Setting
Reserved (do not set)
IrDA interface
Reserved (do not set)
Normal interface
ESIF: Serial interface enable register
(00FF40HD0)
Sets the input/output terminals for serial interface.
When "1" is written: Serial I/F I/O terminal
When "0" is written: I/O port terminal
Reading: Valid
The ESIF register is the serial interface enable
register. When "1" is written to the register, speci-
fied I/O port terminals are set to the terminals for
the serial interface. Refer to Section 5.14.2, "Trans-
fer mode and input/output terminals", for the
terminal configurations.
When "0" is written, they become the I/O port
terminals.
At initial reset, the ESIF register is set to "0" (I/O
port terminal).
PTOUT: 8-bit programmable timer clock output
control register (00FF38HD2)
Controls the clock output to the serial interface.
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
The PTOUT register is the output control register
of the 8-bit programmable timer. When "1" is
written to this register, the clock (underflow
1/2)
that is generated by the 8-bit programmable timer
is output to the serial interface.
When "0" is written, the clock is not output to the
serial interface.
Refer to Section 5.13, "8-bit Programmable Timer",
for control of the 8-bit programmable timer.
At initial reset, the PTOUT register is set to "0"
(OFF).