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參數(shù)資料
| 型號(hào)： | S1C88409D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.8 MHz, MICROCONTROLLER, UUC108 |
| 封裝： | DIE-108 |
| 文件頁(yè)數(shù)： | 95/250頁(yè) |
| 文件大?。?/td> | 1877K |
| 代理商： | S1C88409D |
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174
EPSON
S1C88409 TECHNICAL MANUAL
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (Touch Panel Controller)
The setting must meet following conditions.
MVH
≥ MVMH ≥ MVML ≥ MVL
In the normal mode, the controller gets the draw-
ing speed from the difference between the previ-
ous coordinate values and current coordinate
values, and decides the next arithmetic mean
count according to the threshold values set in these
registers.
Table 5.17.6.7 shows the mean count that will be
set.
Table 5.17.6.7 Arithmetic mean count in normal mode
Judgment
speed
~MVL
MVL
≤ MVML
MVML
≤ MVMH
MVMH
≤ MVH
MVH~
Next number of
A/D conversion
256 times
128 times
64 times
32 times
16 times
The set number of A/D conversions are performed
for both the X and Y coordinates.
The settings of these registers are invalid in the
constant-speed mode.
At initial reset, the registers are set as follows:
MVH:
1000B (18)
MVMH: 0110B (14)
MVML: 0100B (10)
MVL:
0010B (6)
IVL0–IVL3: Interval time setting register
(00FFA6HD0–D3)
Sets the interval time after A/D conversion.
Table 5.17.6.8 Interval time
IVL3
0
1
IVL2
0
1
0
1
IVL1
0
1
0
1
0
1
0
1
IVL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Interval time
128
×1/f
128
×2/f
128
×3/f
128
×4/f
128
×5/f
128
×6/f
128
×7/f
128
×8/f
128
×9/f
128
×10/f
128
×11/f
128
×12/f
128
×13/f
128
×14/f
128
×15/f
128
×16/f
The selected interval is inserted after four A/D
conversions are finished.
At initial reset, the IVL register is set to "0010B"
(128
× 3).
PEN: Pen-up/pen-down status (00FFA7HD0)
Indicates pen-up status and pen-down status.
When "1" is read: Pen-down
When "0" is read: Pen-up
Writing: Invalid
The pen status during coordinate detection can be
found by reading the PEN bit.
When the controller detects a value bigger than the
threshold value for pen-up judgment set with the
PUD register, the PEN bit goes "1" and when a
smaller value is detected goes "0".
Writing operation is invalid because PEN is a read-
only bit.
At initial reset, PEN is set to "0" (pen-up).
DX0–DX11: X coordinate data register
(00FFA9HD0–D3, 00FFA8)
DY0–DY11: Y coordinate data register
(00FFABHD0–D3, 00FFAA)
The A/D conversion result is written to this
register through arithmetic mean.
Data is not written if it is judged as a noise.
Be sure to read all the coordinate data registers
(00FFA8, 00FFA9, 00FFAA, 00FFAB) after a data
update interrupt is generated. This process is
required if the coordinate data at that point is
unnecessary because the next data update inter-
rupt cannot be generated if all the register data are
not read.
Writing operation is invalid because they are read-
only registers.
At initial reset, both the DX and DY registers are
set to "0".
PTP0, PTP1: Interrupt priority register
(00FF22HD4, D5)
Sets the priority level of the touch panel controller
interrupt.
Table 5.17.6.9 shows the interrupt priority level
which can be set by the PTP register.
Table 5.17.6.9 Interrupt priority level settings
PTP1
1
0
Interrupt priority level
Level 3
Level 2
Level 1
Level 0
PTP0
1
0
1
0
(IRQ3)
(IRQ2)
(IRQ1)
(None)
At initial reset, the PTPD register is set to "0" (level
0).
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