參數(shù)資料
型號(hào)： S1C88409D
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.8 MHz, MICROCONTROLLER, UUC108
封裝： DIE-108
文件頁(yè)數(shù)： 247/250頁(yè)
文件大?。?/td> 1877K
代理商： S1C88409D
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86
EPSON
S1C88409 TECHNICAL MANUAL
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (Clock Output)
HZR40, HZR41: R4 port high impedance control
register (00FFD4HD0, D1)
Sets the output terminals into a high impedance
state.
When "1" is written: High impedance
When "0" is written: Complementary
Reading: Valid
The HZR40 and HZR41 registers are the high
impedance control registers for the output ports
R40 and R41 used for the clock output.
Fix data of the port used for the clock output at "0".
At initial reset, the HZR register is set to "1" (high
impedance).
R40D, R41D: R4 port output data register
(00FFD9HD0, D1)
They are the data registers for the output ports
R40, R41 used for the clock output.
When "1" is written: Clock output is possible
When "0" is written: LOW (VSS) level is output
Reading: Valid
Fix data of the port used for the clock output at "1".
At initial reset, the data bits are all set to "1".
PSF10–PSF12: FOUT1 division ratio selection
register (00FF14HD4–D6)
Selects the frequency for the FOUT1 clock.
It can be selected from 8 types of division ratio
shown in Table 5.9.3.1.
This register can also be read.
At initial reset, the PSF1 register is set to "0"
(fOSC1/1).
PRFO1: FOUT1 output control register
(00FF14HD7)
Controls the FOUT1 output.
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
When "1" is written to the PRFO1 register, the
FOUT1 (R41) terminal outputs the clock selected
with the PSF1 register. However, the high-imped-
ance control register HZR41 of the output port R41
must be set to "0" and the data register R41D must
be set to "1".
When "0" is written, the clock is not output.
At initial reset, the PRFO1 register is set to "0"
(OFF).
PSF30–PSF32: FOUT3 division ratio selection
register (00FF14HD0–D2)
Selects the frequency for the FOUT3 clock.
It can be selected from 8 types of division ratio
shown in Table 5.9.3.1.
This register can also be read.
At initial reset, the PSF3 register is set to "0"
(fOSC3/1).
PRFO3: FOUT3 output control register
(00FF14HD3)
Controls the FOUT3 output.
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
When "1" is written to the PRFO3 register, the
FOUT3 (R40) terminal outputs the clock selected
with the PSF3 register. However, the high-imped-
ance control register HZR40 of the output port R40
must be set to "0" and the data register R40D must
be set to "1". Furthermore, the OSC3 oscillation
circuit must be used.
When "0" is written, the clock is not output.
At initial reset, the PRFO3 register is set to "0"
(OFF).
PTOUT0: 16-bit programmable timer 0
clock output control register (00FF30HD3)
Controls the output of the TOUT0 signal (16-bit
programmable timer 0 clock).
When "1" is written: ON
When "0" is written: OFF
Reading: Valid
The PTOUT0 register is the output control register
for the TOUT0 signal. When "1" is written to this
register, the TOUT0 signal is output from the
TOUT0 (R40) terminal. When "0" is written, the
terminal goes high (VDD) level. However, the high-
impedance control register HZR40 of the output
port R40 must be set to "0" and the data register
R40D must be set to "1".
The TOUT0 clock cannot be output simultaneously
with the FOUT3 clock.
Refer to Section 5.12, "16-bit Programmable Timer",
for setting of clock frequency.
At initial reset, the PTOUT0 register is set to "0"
(OFF).
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