
S1C88409 TECHNICAL MANUAL
EPSON
23
CHAPTER 4: INITIAL RESET
4.3 Initial Settings at Initial Reset
Initial settings of internal registers
The internal registers in the CPU are initialized as
follows during initial reset.
Table 4.3.1 Initial settings
Register name
Data register A
Data register B
Index (data) register L
Index (data) register H
Index register IX
Index register IY
Program counter
Stack pointer
Base register
Zero flag
Carry flag
Overflow flag
Negative flag
Decimal flag
Unpack flag
Interrupt flag 0
Interrupt flag 1
New code bank register
Code bank register
Expand page register
Expand page register for IX
Expand page register for IY
Symbol
A
B
L
H
IX
IY
PC
SP
BR
Z
C
V
N
D
U
I0
I1
NB
CB
EP
XP
YP
Bit length
8
16
8
1
8
Initial value
Undefined
Undefined*
Undefined
0
1
01H
Undefined*
00H
The reset exception processing loads the value
stored in Bank 0, 00000H–000001H into the PC.
At the same time, the NB initial value 01H is
loaded into CB.
Registers which are not initialized at initial reset
should be initialized using software.
Stack
The stack pointer SP is undefined at initial reset.
Be sure to initialize SP before subroutines and
interrupts generate.
In the S1C88409, the stack page is fixed at Page 0.
Therefore, reserve the stack area in the RAM
expanded in Page 0 or the data memory area of the
internal RAM (–00FEFFH).
Note: The display memory area configured by
mask option may be used as data memory.
However, the stack area cannot be as-
signed there.
Internal RAM (Data memory, Display memory)
Since the internal RAM is not initialized at initial
reset, initialize with software.
System and terminal configuration
When the S1C88409 is used in the MCU mode, the
bus mode is set to the single chip mode at initial
reset. In the MPU mode, it is set to the mode
selected by the mask option.
Refer to Section 1.4, "Pin Layout Diagram", for the
terminal configuration depending on the bus
mode setting.
Internal peripheral circuit
The internal peripheral circuits are initialized to
prescribed status. Initialize with software if
necessary.
Especially the input/output terminals of the
peripheral circuits are all set as the output port
terminals and the I/O port terminals. Switch them
according to the peripheral circuit to be used.
Refer to Section 5.1, "I/O Memory Map", or
respective sections of the peripheral circuits for
details of the status and initial values.
Interrupt
After initial reset, all the interrupts including NMI
are masked until the appropriate values are
written to the I/O memory addresses "00FF00H"
and "00FF01H" to prevent malfunctions that may
occur before setting the system configuration.
Refer to Section 5.2, "System Controller and Bus
Control", for the contents of the addresses.