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S1C88409 TECHNICAL MANUAL
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and Standby Mode)
5.20 Interrupt and Standby Mode
5.20.1 Types of interrupts
The S1C88409 allows one line of non-maskable
interrupt, and 10 systems (22 types) of hardware
interrupts.
Non-maskable interrupts (NMI)
Watchdog timer interrupt (1 type)
NMI is the interrupt that cannot be masked with
software. It is accepted prior to all hardware
interrupts. However, the watchdog timer can be
set by software so that it does not generate NMI.
Refer to Section 5.3, "Watchdog Timer", for the
control of the watchdog timer.
NMI is exceptionally masked at initial reset and it
is not input to the CPU in order to prevent mal-
function caused by an NMI generation before
setting the system configuration. The masking is
released when data is written to the addresses
00FF00H and 00FF01H in the I/O memory.
Hardware interrupts
External interrupts
K00–K07 input interrupt
(1 type)
K10–K13 input interrupt
(4 types)
Internal interrupts
16-bit programmable timer 0 interrupt (2 types)
16-bit programmable timer 1 interrupt (2 types)
8-bit programmable timer interrupt
(1 type)
Serial interface interrupt
(3 types)
Touch panel controller interrupt
(2 types)
LCD controller interrupt
(1 type)
A/D converter interrupt
(1 type)
Clock timer interrupt
(5 types)
An interrupt factor flag that indicates a generation
of the interrupt factor and an interrupt enable
register to enable/disable the interrupt request
have been provided for each interrupt. By using
those, interrupt generation can be controlled by
each factor.
In addition, an interrupt priority register has been
provided for each system of interrupts and the
priority of interrupt processing can be set to 3
levels in each system.
Figure 5.20.1.1 shows the configuration of the
interrupt circuit.
Refer to the explanations of the respective periph-
eral circuits for details of each interrupt.