
Chapter 4
Registers
307
24674
Rev. 3.00
April 2003
AMD-8111 HyperTransport I/O Hub Data Sheet
AMD Preliminary Information
4.
Read the data from xxx_DATA.
The PCI configuration registers and the memory-mapped registers can be accessed in any data width
up to 32 bits.
The controller's registers can be divided into several functional groups: PCI Configuration Alias
registers, PCI Configuration registers, Setup registers, Running registers, and Test registers.
The PCI Configuration Alias registers are typically programmed by the chip set initialization
software. In this way, they are initialized before the BIOS accesses the PCI Configuration registers.
This group includes the Vendor ID Alias, Device ID Alias, Sub Vendor ID Alias, Sub System ID
Alias, MIN_GNT Alias, MAX_LAT Alias, and PMC Alias registers at offsets C0h to DFh in PCI
Configuration Space.
The PCI Configuration registers are accessed by the system BIOS software to configure the network
controller. These registers include the Memory Base Address register, the Interrupt Line register, the
PCI Command register, the PCI Status register and the PMC register. Typically, device information is
also read from the SID, SVID and VID registers.
The Setup registers include most of the remaining memory-mapped registers. The programming of
these is typically divided between the chip set initialization software and the driver software. Many of
these registers are optional and need not be initialized unless the associated function is used.
Typically, the SRAM_SIZE, SRAM_BND and PADR registers are initialized by the chip set
initialization software. The driver initializes the BADR, BADX, RCV_RING_LEN,
XMT_RING_LEN and LADRF registers. The CMD2, CMD3, CTRL1 and CTRL2 registers are
typically partially initialized by the chip set initialization software and partially by the driver. The
CMD7 register is initialized by the driver. The driver reads the CHIPID register at initialization time.
The PHY_ACCESS register may be used at this time to initialize the external PHY.
Running registers are accessed by the driver software. These include the CMD0, INT0, INTEN0,
STAT0, LADRF and MIB registers. The driver may access other registers during operation depending
on the features being used.