
114
Functional Operation
Chapter 3
AMD-8111 HyperTransport I/O Hub Data Sheet
24674
Rev. 3.00
April 2003
AMD Preliminary Information
Figure 28.
Indirect Access to Auto-Poll Data Registers
Auto-Poll Register 0 differs from the other Auto-Poll Registers in several ways. The PHY address
(AP_PHY0_ADDR) field of this register defines the default PHY address that is used by both the
Auto-Poll State Machine and the Network Port Manager. The register number field is fixed at 1
(which corresponds to the external PHY status register), and the register is always enabled. This
means that if the Auto-Poll State Machine is enabled, it always polls register 1 of the default PHY and
interrupts the host CPU when it detects a change in that register.
In addition to the PHY address, register number, and enable bit, the Auto-Poll Registers contain two
other control bits for each of the 5 user-selected registers. These bits are the Preamble Suppression
(AP_PRE_SUP) and Default PHY (AP_DFLT_PHY) bits.
If the Preamble Suppression bit is set, the Auto-Poll sends management frames to the corresponding
register with no preamble field. The host CPU should only set the Preamble Suppression bit for
registers in PHY devices that are known to be able to accept management frames without preambles.
For PHY devices that comply with Clause 22 of IEEE standard 802.3, bit 6 of PHY register 1 is fixed
at 1 if the PHY accepts management frames with the preamble suppressed.
If the Default PHY bit (AP_PHYx_DFLT) is set, the corresponding Preamble Suppression bit and
PHY address field are ignored. In this case the Auto-Poll State Machine uses the default PHY address
from the AP_PHY0_ADDR field, and suppresses the preamble if the Network Port Manager logic has
determined that the default PHY device accepts management frames with no preamble. If the
Network Port Manager logic has not determined that the default PHY device accepts management
frames with no preamble, the Auto-Poll State Machine does not suppress the preamble when
accessing the selected register.
The Auto-Poll State Machine is enabled when the Auto-Poll External PHY (APEP) bit (CMD3, bit
10) is set to 1. If APEP is cleared to 0, the Auto-Poll machine does not poll any PHY registers
regardless of the state of the enable bits in the Auto-Poll registers. The APEP bit has no effect on the
Network Port Manager, which may poll the default PHY even when the state of the APEP bit is 0.
The host CPU must ensure that the APEP bit is cleared to 0 before it changes the contents of any of
the Auto-Poll registers.
Auto_Poll_Data[5:0]
0
1
4
5
ADR
VALUE
AP_VALUE Register