
246
Registers
Chapter 4
AMD-8111 HyperTransport I/O Hub Data Sheet
24674
Rev. 3.00
April 2003
AMD Preliminary Information
Notes:
1. The signals from GPIO[31:28] go directly to the IOAPIC to drive the interrupt request
inputs to some of the redirection-table entries. The polarity of these signals at the IOAPIC is
as seen at the external pins, the polarity is not altered by programming of
DevB:3x[DF:DC]. These signals, from the GPIO pins to the IOAPIC, are not ever disabled,
even if the pin’s function is other-than GPIO. Also, see DevB:0x4B[MPIRQ] for details on
how GPIO[31:28] may be mapped to PIRQ[A,B,C,D]_L.
2. These pins, corresponding registers, and GPIO logic reside on the VDD_IOX and
VDD_COREX power planes, respectively, and are reset by RST_SOFT. All the other GPIO
pins reside on the main power supply.
3. When the CLKRUN_L function is enabled, CLKRUN_L functionality is automatically
enabled. To disable CLKRUN_L functionally, this pin should be programmed as a GPIO.
Table 60.
GPIO Register Default States
GPIO Name Control Reg Signal Name
GPIO0
PMC0
GPIO1
PMC1
GPIO2
PMC2
GPIO3
PMC3
GPIO4
PMC4
GPIO5
PMC5
GPIO6
PMC6
GPIO7
PMC7
GPIO8
PMC8
GPIO9
PMC9
GPIO10
PMCA
GPIO11
PMCB
GPIO12
PMCC
GPIO13
PMCD
GPIO14
PMCE
GPIO15
PMCF
GPIO16
PMD0
GPIO17
PMD1
GPIO18
PMD2
GPIO19
PMD3
GPIO20
PMD4
GPIO21
PMD5
GPIO22
PMD6
GPIO23
PMD7
GPIO24
PMD8
GPIO25
PMD9
GPIO26
PMDA
GPIO27
PMDB
GPIO28
PMDC
GPIO29
PMDD
GPIO30
PMDE
GPIO31
PMDF
Default
08h (ACAV input)
05h (GPIO1 output, High)
08h (BATLOW_L input)
08h (C32KHZ output)
04h (GPIO4 output, Low)
04h (GPIO5 output, Low)
05h (GPIO6 output, High)
05h (GPIO7 output, High)
05h (GPIO8 output, High)
08h (FANCON1 output)
08h (FANRPM input)
05h (GPIO11 output, High)
09h (IRQ1 input)
09h (IRQ6 input)
00h (GPIO14 input)
09h (IRQ12 input)
00h (GPIO 16 input)
00h (GPIO 17 input)
00h (GPIO 18 input)
09h (PNPIRQ0 input)
09h (PNPIRQ1 input)
09h (PNPIRQ2 input)
Mode
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
0Xb
1Xb
0Xb
0Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
1Xb
0Xb
0Xb
0Xb
0Xb
0Xb
0Xb
Input Path
GPIO
N/A
GPIO
N/A
N/A
Direct
N/A
N/A
N/A
N/A
direct
N/A
GPIO
GPIO
N/A
GPIO
N/A
N/A
Direct
GPIO
GPIO
GPIO
Direct
GPIO
Direct
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Notes
2
2
2
2
4
3
ACAV
AGPSTOP_L
BATLOW_L
C32KHZ
GPIO4
CLKRUN_L
CPUSLEEP_L
CPUSTOP_L
GPIO8
FANCON1
FANRPM
INTIRQ8_L
IRQ1
IRQ6
GPIO14
IRQ12
GPIO16
GPIO17
LID
PNPIRQ0
PNPIRQ1
PNPIRQ2
SMBALERT0_L 08h (SMBALERT0_L input)
SLPBTN_L
08h (SLPBTN_L input)
SMBALERT1_L 08h (SMBALERT1_L input)
SUSPEND_L
08h (SUSPEND_L output)
GPIO26
00h (GPIO 26 input)
GPIO27
00h (GPIO 27 input)
GPIO28
00h (GPIO28 input)
GPIO29
00h (GPIO29 input)
GPIO30
00h (GPIO30 input)
GPIO31
00h (GPIO31 input)
2
2
2
2
2
2
1
1
1
1