
Chapter 4
Registers
225
24674
Rev. 3.00
April 2003
AMD-8111 HyperTransport I/O Hub Data Sheet
AMD Preliminary Information
General Purpose 0 ACPI Interrupt Enable Register (ACPI GPE0_EN)
PM22
For each of the bits in this register: 1=Enable a corresponding status bit in PM20 to generate an SMI
or SCI interrupt (based on the state of PM04[SCI_EN]). 0=Do not enable the SMI or SCI interrupt.
Default:
0000h.
Attribute:
Read-write.
8
PME_STS. PME_L pin status.
This bit is set High by the hardware when the PME_L pin is asserted
Low. This bit may be set High by the PME function from the Ethernet controller. This bit resides on the
VDD_COREX power plane.
TCOSCI_STS. TCO SCI interrupt status.
This bit is set High by the hardware when there is a 0 to 1
transition on PM46[INTRDR_STS] or PM44[TCO_INT_STS].
Reserved.
SIT_STS. System inactivity timer time out status.
This bit is set High by the hardware when the
system inactivity timer times out.
Reserved.
SMBC_STS. SMBus controller system management event.
This bit is set High by the SMBus
controller. This bit resides on the VDD_COREX power plane.
Reserved. Software should ignore this bit.
AC97_STS. AC
‘
97 wake event status.
This bit is set High by the hardware when the AC
‘
97 link
generates a wake event. This bit resides on the VDD_COREX power plane. This bit is also set if
AC30/MC40[GPIINT] is
‘
1
’
.
DM_STS. Hardware device monitor (parent) event status.
This bit is set High by the hardware
when any of the device monitor event status bits in PMA0 become active when enable by the
corresponding bits in PMA4.
7
6
5
4
3
2
1
0
Bits
15
Description
USBRSM_EN. USB resume event ACPI interrupt enable
. This bit resides on the VDD_COREX
power plane.
RI_EN. RI_L pin ACPI interrupt enable
. This bit resides on the VDD_COREX power plane.
LID_EN. LID pin ACPI interrupt enable
. This bit resides on the VDD_COREX power plane.
ACAV_EN. ACAV pin ACPI interrupt enable
. This bit resides on the VDD_COREX power plane.
SMBUS_EN. SMBus (parent) ACPI interrupt enable
. This bit resides on the VDD_COREX power
plane.
THERM_EN. THERM_L pin ACPI interrupt enable.
EXTSMI_EN. External SMI pin ACPI interrupt enable.
This bit resides on the VDD_COREX power
plane.
PME_EN. PME_L pin ACPI interrupt enable
. This bit resides on the VDD_COREX power plane.
TCOSCI_EN. TCO SCI enable
. Note: when this is High, DevB:3x44[TCO_INT_SEL] is ignored.
Reserved.
SIT_EN. System inactivity timer time out ACPI interrupt enable
.
Reserved.
14
13
12
11
10
9
8
7
6
5
4
Bits
Description (Continued)