516
APPENDIX B INSTRUCTIONS
MB90560 series
Table A.2-1 Logical 2 (long-word): 6 instructions
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Table B.8-9 Sign inversion (byte, word): 6 instructions
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Table B.8-10 Normalization (long-word): 1 instruction
*1 4 when all accumulators indicate 0, 6 + (R0) otherwise
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Mnemonic
A,ear
A,eam
#
2
~
RG
2
0
B
0
(d)
Operation
LH
-
-
AH
-
-
I
-
-
S
-
-
T
-
-
N
Z
V
R
R
C
-
-
RMW
-
-
ANDL
ANDL
ORL
ORL
A,ear
A,eam
XORL
XORL
A,ear
A,eam
2+
2
2+
2
2+
6
7+(a)
6
7+(a)
6
7+(a)
2
0
2
0
0
(d)
0
(d)
long (A)
←
(A) and (ear)
long (A)
←
(A) and (eam)
long (A)
←
(A) or (ear)
long (A)
←
(A) or (eam)
long (A)
←
(A) xor (ear)
long (A)
←
(A) xor (eam)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R
R
R
R
-
-
-
-
-
-
-
-
Mnemonic
A
#
1
~
RG
0
B
0
Operation
LH
X
AH
-
I
-
S
-
T
-
N
Z
V
C
RMW
-
NEG
NEG
NEG
ear
eam
2
2+
2
3
5+(a)
2
0
0
2+(b)
byte (A)
←
0 - (A)
byte (ear)
←
0 - (ear)
byte (eam)
←
0 - (eam)
word (A)
←
0 - (A)
-
-
-
-
-
-
-
-
-
-
-
-
NEGW
A
NEGW
NEGW
ear
eam
1
2
2+
2
2
5+(a)
0
2
0
0
0
2+(c)
word (ear)
←
0 - (ear)
word (eam)
←
0 - (eam)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
NRML
A,R0
2
*1
1
0
long (A)
←
Shift to the
position where 1 was
formerly placed
byte (R0)
←
Number of shifts at
that time
-
-
-
-
-
-
-
-
-