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CHAPTER 11 16-BIT RELOAD TIMER
MB90560 series
11.7 Usage Notes on the 16-Bit Reload Timer
Notes on using the 16-bit reload timer are given below.
I
Usage notes on the16-bit reload timer
G
Notes on using a program for setting
Write a value to the 16-bit reload register (TMRLR) when counting stops (TMCSR: CNTE =
0). Also, a value can be read from the 16-bit timer register (TMR) even during counting, but
always be sure to use a word transfer instruction (MOVW A, dir, etc.).
Change the CSL1 and CSL0 bits of the timer control status register (TMCSR) when the
counter has stopped (TMCSR: CNTE = 0).
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Notes about interrupts
When the UF bit of the timer control status register (TMCSR) is set to 1 and an interrupt
request is enabled (TMCSR: INTE = 1), control cannot be returned from interrupt processing.
Always clear the UF bit.
Since the 16-bit reload timer 0 shares an interrupt vector with 8-bit timer 0/1/2, interrupt
causes must be checked carefully by the interrupt processing routine when interrupts are
used.
Furthermore, when EI
2
OS is used by the 16-bit reload timer 0, 8-bit timer 0/1/2 interrupts
must be disabled
Since the 16-bit reload timer 1 shares an interrupt vector with 16-bit free-run timer, interrupt
causes must be checked carefully by the interrupt processing routine when interrupts are
used.
Furthermore, when EI
2
OS is used by the 16-bit reload timer 0, 16-bit free-run timer interrupts
must be disabled