
466
CHAPTER 17 ADDRESS MATCH DETECTION FUNCTION
MB90560 series
17.1 Overview of the Address Match Detection Function
An instruction code to be read by the CPU is replaced forcibly with an INT9 instruction
code (01
H
) when the corresponding address is equal to the value set in an address
detection register. Therefore, the CPU executes the INT9 instruction when executing
the set instruction. A program patch application function can be implemented by
processing with the INT #9 interrupt routine.There are two address detection registers,
of which each is provided with an interrupt enable bit and interrupt flag.
When the address is equal to the value set in the address detection register, and the
interrupt enable bit is “1”, assume the following: the interrupt flag is set to “1”, and the
instruction code to be read by the CPU is replaced forcibly with the INT9 instruction
code. The interrupt flag is cleared to “0” by writing “0” to it using an instruction.
I
Registers
I
Block Diagram
Figure 17.1-1 Block diagram
Bit No.
0 0 0 0 0 0 0 0
B
R/W
7
6
5
4
3
2
1
0
R/W
R/W
R/W
-
-
-
-
Initial value
Byte
Byte
Byte
Initial value
R/W
Undefined
R/W
Undefined
PADR0 address :1FE2
H
/ 1FE1
H
/ 1FE0
H
PADR1 address :1FE5
H
/ 1FE4
H
/ 1FE3
H
:00009E
H
PACSR address
Access
AD1F
AD1F
AD1D
AD0D
Reserved
Reserved
Reserved Reserved
Reset
Set
F
2
MC-16LX
CPU core
Address latch
Enable bit
Detection bit
Address detection
F
2
M
C