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CHAPTER 12 MULTI-FUNCTION TIMER
MB90560 series
12.3.2 Registers of 16-bit Output Compare
12.3.2.2 Compare Control Registers (OSC0/1/2/3/4/5)
Compare control register is used to control the output level, output enable, output
reverse mode, compare operation enable, compare match interrupt enable and
compare match interrupt flag for RTO0~5.
I
Compare control register (Upper, OSC1/3/5)
Figure 12.3.2.2-1 Compare Control Register (Upper, OSC1/3/5)
Address
Bit 15
—
Bit 14
—
Bit 13
—
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Initial value
ch1: 00007D
H
Ch3: 00007F
H
Ch5: 000081
H
CMOD
OTE1
OTE0
OTD1
OTD0
XXX00000
B
—
—
—
R/W
R/W
R/W
R/W
R/W
OTD0
Output level bit
0
Output “0” for RT0/RT2/RT4
1
Output “1” for RT0/RT2/RT4
OTD1
Output level bit
0
Output “0” for RT1/RT3/RT5
1
Output “1” for RT1/RT3/RT5
OTE0
Output enable bit
0
General-purpose port (port 30/32/34)
1
Output compare output pin (RT0/RT2/RT4)
OTE1
Output enable bit
0
General-purpose port (Port 31/33/35)
1
Output compare output pin (RT1/RT3/RT5)
CMOD
Output level reverse mode bit
0
RT0/2/4: The level is reversed upon a match with
compare register 0/ 2/ 4.
RT1/3/5: The level is reversed upon a match with
compare register 1/3/5 respectively
1
RT0/2/4: The level is reversed upon a match with
compare register 0/2/4.
RT1/3/5: The level is reversed upon a match with
compare register 0 or 1, 2 or 3, 4 or 5.
X
: Indeterminate
R/W : Read and write
: Initial value
—
: not used