![](http://datasheet.mmic.net.cn/330000/MB90F562_datasheet_16437954/MB90F562_504.png)
480
APPENDIX A I/O MAP
MB90560 series
Table A I/O map (continued)
Address
Abbreviation
Register
Access
Resource name
Initial value
000029
H
ODCR0
Communication prescaler
control register 0
R/W
Communication
prescaler
(UART0)
0***0000
B
00002A
H
Prohibited area
00002B
H
CDCR1
Co0mmunication prescaler
control register 1
R/W
Communication
prescaler
(UART1)
0***0000
B
00002C
H
~2F
H
Prohibited area
000030
H
ENIR
Interrupt/DTP enable register
R/W
DTP/external
interrupt
00000000
B
000031
H
ENRR
Interrupt/DTP cause register
R/W
00000000
B
000032
H
ELVR
Request level setting register
R/W
00000000
B
000033
H
R/W
00000000
B
000034
H
ADCS0
A/D control status register
R/W
00000000
B
000035
H
ADCS1
R/W
00000000
B
000036
H
ADCR0
A/D data register
R
XXXXXXXX
B
000037
H
ADCR1
R or W
00101*XX
B
000038
H
PRLL0
PPG0 reload register
R/W
8-/16-bit PPG
timer (CH0,
CH1)
XXXXXXXX
B
000039
H
PRLH0
R/W
XXXXXXXX
B
00003A
H
PRLL1
PPG1 reload register
R/W
XXXXXXXX
B
00003B
H
PRLH0
R/W
XXXXXXXX
B
00003C
H
PPGC0
PPG0 operation mode register
R/W
00000001
B
00003D
H
PPGC1
PPG1 operation mode register
R/W
00000001
B
00003E
H
PCS01
PPG0/PPG1 clock control
register
R/W
000000**
B
00003F
H
Prohibited area
000040
H
PRLL2
PPG2 reload register
R/W
8-/16-bit PPG
timer (CH2,
CH3)
XXXXXXXX
B
000041
H
PRLH2
R/W
XXXXXXXX
B
000042
H
PRLL3
PPG3 reload register
R/W
XXXXXXXX
B
000043
H
PRLH3
R/W
XXXXXXXX
B
000044
H
PPGC2
IPPG2 operation mode register
R/W
00000001
B
000045
H
PPGC3
PPG3 operation mode register
R/W
00000001
B
000046
H
PCS23
PPG2/PPG3 clock control
register
R/W
000000**
B
000047
H
Prohibited area