Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
89
Agere Systems Inc.
8 TMUX Registers
(continued)
Note:
In
Table 87
, the mask bits are set to suppress an interrupt when the corresponding event has occurred or
change in state has taken place.
Table 87. TMUX_RPOH[1
—
3]_MSK, Mask Bits for Interrupt Signal (R/W) (Mask = 1, No Mask = 0)
Address
Bit
Name
Function
Reset
Default
1
0x4000D
15
TMUX_RSFB3M1
Receive Path Signal Fail BER Algorithm Mask.
See
Table 83
for description.
Receive Path Signal Degrade BER Algorithm Mask.
See
Table 83
for description.
TMUX_RUNEQPM1
Receive Path Unequipped Mask.
See
Table 83
for description.
TMUX_RPLMPM1
Receive Path Payload Label Mismatch Mask.
See
Table 83
for description.
TMUX_RN1MONM1
Receive N1 Monitor Mask.
See
Table 83
for description.
TMUX_RK3MONM1
Receive K3 Monitor Mask.
See
Table 83
for description.
TMUX_RF3MONM1
Receive F3 (Path User Byte) Monitor Mask.
See
Table 83
for
description.
TMUX_RF2MONM1
Receive F2 (Path User Byte) Monitor Mask.
See
Table 83
for
description.
TMUX_RRDIPM1
Receive Path RDI (Remote Defect Indication) Monitor Mask.
See
Table 83
for description.
TMUX_RC2MONM1
Receive C2 (Signal Label) Monitor Mask.
See
Table 83
for
description.
TMUX_RTIMPM1
Receive Path Trace Identifier Mismatch Mask.
See
Table 83
for description.
TMUX_RNDFM1
Receive New Data Flag Mask.
See
Table 83
for description.
TMUX_RDECM1
Receive Pointer Decrement Mask.
See
Table 83
for descrip-
tion.
TMUX_RINCM1
Receive Pointer Increment Mask.
See
Table 83
for descrip-
tion.
TMUX_RPAISM1
Receive Path AIS Mask.
See
Table 83
for description.
TMUX_RLOPM1
Receive Loss of Pointer Mask.
See
Table 83
for description.
TMUX_RSFB3M2
Receive Path Signal Fail BER Algorithm Mask.
See
Table 83
for description.
TMUX_RSDB3M2
Receive Path Signal Degrade BER Algorithm Mask.
See
Table 83
for description.
TMUX_RUNEQPM2
Receive Path Unequipped Mask.
See
Table 83
for description.
TMUX_RPLMPM2
Receive Path Payload Label Mismatch Mask.
See
Table 83
for description.
TMUX_RN1MONM2
Receive N1 Monitor Mask.
See
Table 83
for description.
TMUX_RK3MONM2
Receive K3 Monitor Mask.
See
Table 83
for description.
TMUX_RF3MONM2
Receive F3 (Path User Byte) Monitor Mask.
See
Table 83
for
description.
TMUX_RF2MONM2
Receive F2 (Path User Byte) Monitor Mask.
See
Table 83
for
description.
TMUX_RRDIPM2
Receive Path RDI (Remote Defect Indication) Monitor Mask.
See
Table 83
for description.
14
TMUX_RSDB3M1
1
13
12
1
1
11
10
9
1
1
1
8
1
7
1
6
1
5
1
4
3
1
1
2
1
1
0
1
1
1
0x4000E
15
14
1
13
12
1
1
11
10
9
1
1
1
8
1
7
1