
Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
397
Agere Systems Inc.
18 SPE Mapper Functional Description
(continued)
Table of Contents
(continued)
Figures
Page
Figure 30. SPE Mapper Block with Connections to External Pins and Other Blocks in the Device ..................... 399
Figure 31. Basic Functional Flow of the SPE Mapper Transmit Section.............................................................. 400
Figure 32. Basic Functional Flow of the SPE Mapper Receive Section............................................................... 401
Figure 33. STS-1 NSMI Receive Operation ......................................................................................................... 405
Figure 34. STS-1 NSMI Transmit Operation ........................................................................................................ 406
Figure 35. Receive Direction Path Termination Block.......................................................................................... 407
Figure 36. Pointer Interpretation State Diagram................................................................................................... 408
Figure 37. Transmit Direction Path Insertion Block.............................................................................................. 420
Tables
Page
Table 536. J1 Monitor .......................................................................................................................................... 412
Table 537. STS Signal Label Defect Conditions ................................................................................................. 412
Table 538. C2MON Processing ........................................................................................................................... 413
Table 539. F2 Monitor ......................................................................................................................................... 414
Table 540. F3 Monitor ......................................................................................................................................... 414
Table 541. N1 Monitor ......................................................................................................................................... 414
Table 542. K3 Monitor ......................................................................................................................................... 415
Table 543. AIS-P and RDI-P Detect .................................................................................................................... 415
Table 544. STS-1 P-REI Interpretation ................................................................................................................ 416
Table 545. Signal Degrade Parameters .............................................................................................................. 417
Table 546. Signal Fail Parameters ...................................................................................................................... 418
Table 547. Path Overhead Byte Access .............................................................................................................. 419
Table 548. RDI-P Defects for Enhanced RDI-P Mode ........................................................................................ 422
Table 549. Path Overhead Byte Access
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Transmit Direction ............................................................................. 423
Table 550. TPOAC Control Bits .......................................................................................................................... 424