Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
321
Agere Systems Inc.
13 Cross Connect (XC) Registers
Table of Contents
Contents
Page
13 Cross Connect (XC) Registers ....................................................................................................................... 321
13.1 Cross Connect Register Descriptions ..................................................................................................... 322
13.2 Cross Connect Register Map ................................................................................................................. 328
Tables
Page
Table 448. XC_ID_R, XC Global Register 1 (RO) ............................................................................................... 322
Table 449. XC_CHI_MODE1_R, XC System Interface Global Register 1 (R/W) ................................................ 322
Table 450. XC_CHI_MODE2_R, XC System Interface Global Register 2 (R/W) ................................................ 322
Table 451. XC_PIND_SRC[1
—
15], XC1 External I/O TXDATA and TXCLK Source Configuration (R/W) ......... 323
Table 452. XC_FRP_SRC[1
—
14], XC1 Framer Receive Path Data Source Configuration (R/W) ..................... 323
Table 453. XC_M13_SRC[1
—
14], XC1 M13 Data Source Configuration (R/W) ................................................. 323
Table 454. XC_VT_SRC[1
—
14], XC1 VT Mapper Source Configuration (R/W) ................................................. 324
Table 455. XC_DJA_SRC[1
—
14], XC1 Digital Jitter Attenuator Source Configuration (R/W) ............................ 324
Table 456. XC_FTP_SRC[1
—
14], XC1 Framer Transmit Path Data Source Configuration (R/W) ..................... 324
Table 457. XC_FRS_SRC[1
—
14], XC1 Framer Receive System Interface Source Configuration (R/W) .......... 324
Table 458. XC_TPM_SRC[1
—
4], XC1 Test-Pattern Monitor Source Configuration (R/W) ................................. 325
Table 459. XC2_M12_SRC[1
—
7], XC2 M12 DS2 Clock and Data Source Configuration (R/W) ........................ 325
Table 460. XC2_M23_SRC[1
—
7], XC2 M23 DS2 Data Source Configuration (R/W) ......................................... 325
Table 461. XC2_TPM_SRC, XC2 Test-Pattern Monitor Source Configuration (R/W) ........................................ 326
Table 462. XC_MISC, XC Global Register 2 (R/W) ............................................................................................ 326
Table 463. XC3_TPM_SRC, XC3 Test-Pattern Monitor Source Configuration (R/W) ........................................ 326
Table 464. XC3_MDS3_SRC, XC3 DS3 Source Configuration (R/W) ................................................................ 327
Table 465. XC_PINS_SRC[1
—
15], XC1 External I/O TXSYNC Source Configuration (R/W) ............................ 327
Table 466. XC_ALCO_SRC[1
—
15], XC1 External I/O RXCLK Clock Out Source Configuration (R/W) ............. 327
Table 467. Register Address Map ....................................................................................................................... 328