TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
242
Agere Systems Inc.
12 28-Channel Framer Registers
(continued)
Table of Contents
(continued)
Tables
Page
Table 423. FRM_ARLR3, Arbiter Link Register 3 (R/W) ..................................................................................... 299
Table 424. FRM_FFLR1, Frame Formatter Link Register 1 (R/W) ..................................................................... 300
Table 425. FRM_FFLR2, Frame Formatter Link Register 2 (R/W) ..................................................................... 301
Table 426. Line Decoder Per LInk Register Addressing Map ............................................................................. 302
Table 427. Line Decoder Per Link Registers Address Indexing .......................................................................... 302
Table 428. Line Encoder Per Link Register Addressing Map .............................................................................. 302
Table 429. Line Encoder Per Link Registers Address Indexing .......................................................................... 302
Table 430. FRM_LDLR1, Line Decoder Link Register 1 (R/W) ........................................................................... 303
Table 431. FRM_LDLR2, Line Encoder Link Register 2 (R/W) ........................................................................... 303
Table 432. HDLC Per Channel Register Addressing Map .................................................................................. 304
Table 433. FRM_HCR1, Transmit HDLC Channel Register 1 (R/W) .................................................................. 304
Table 434. FRM_HCR2, Transmit HDLC Channel Register 2 (R/W) .................................................................. 304
Table 435. FRM_HCR3, Transmit HDLC Channel Register 3 (R/W) .................................................................. 305
Table 436. FRM_HCR4, Transmit HDLC Channel Register 4 (RO) .................................................................... 306
Table 437. FRM_HCR5, Transmit HDLC Channel Register 5 (R/W) .................................................................. 306
Table 438. FRM_HCR6, Transmit HDLC Channel Register 6 (WO) ................................................................... 307
Table 439. FRM_HCR7, Transmit HDLC Channel Register 7 (RO) .................................................................... 307
Table 440. FRM_HCR8, Receive HDLC Channel Register 8 (R/W) ................................................................... 307
Table 441. FRM_HCR9, Receive HDLC Channel Register 9 (R/W) ................................................................... 307
Table 442. FRM_HCR10, Receive HDLC Channel Register 10 (R/W) ............................................................... 308
Table 443. FRM_HCR11, Receive HDLC Channel Register 11 (RO) ................................................................. 308
Table 444. FRM_HCR12, Receive HDLC Channel Register 12 (R/W) ............................................................... 309
Table 445. FRM_HCR13, Receive HDLC Channel Register 13 (RO) ................................................................. 310
Table 446. FRM_HGR14, Receive HDLC Channel Register 14 (COR) .............................................................. 310
Table 447. Framer Register Map ......................................................................................................................... 311