Preliminary Data Sheet
May 2001
TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Agere Systems Inc.
591
26 Applications
(continued)
In the transmit direction, J1 path trace insertion, B3 calculation and insertion, C2 signal label insertion, REI-P and
RDI-P insertion; F2 insertion, H4 multiframe insertion, F3 path user byte insertion, K3 insertion, N1 byte insertion,
and AIS-P insertion via POAC or software control is supported.
The transmit path overhead access channel (TPOAC) allows the insertion of all overhead bytes besides B3 which
is automatically calculated. Even or odd parity is checked over all bytes. Bytes which are not enabled for insertion
are set to an all-ones or all-zeros stuff value. The Super Mapper sources a clock and an 8 kHz sync pulse and
receives the data at a rate of 8 bytes per 8 kHz frame.
26.5 STS-3/STM-1 MUX-DeMUX
The STS-3/STM-1 (AU-4) multiplexer provides three modes of operation: STS-3, AU-4, and STS-1.
In STS-3 mode, the block multiplexes and demultiplexes up to three STS-1 signals to/from a SONET STS-3 signal.
In AU-4 mode, it provides the functionality to MUX/deMUX up to three AU-3 signals to/from a STM-1 (AU-4) signal.
In STS-1 mode, it provides the functions to generate and terminate a single STS-1 signal.
The STS-3/STM-1 MUX function takes the bytes in the order they are present on the telecom bus and multiplexes
them into the high-speed signal. Grooming of the VTs/VCs is performed in the SPE mapper of each of the three
devices.
26.6 Telecom Bus Interface
—
Interfacing to Mate Devices
The Super Mapper can communicate with up to three mate devices via a telecom bus interface. The bus operates
at 19.44 MHz for STS-3/STM-1 modes and at 6.48 MHz for STS-1 mode.
In the receive direction, the Super Mapper outputs one parallel clock at 19.44 MHz, three sync signals (SPE,
J0J1V1, and V1), an 8-bit data bus, and an odd/even parity bit. The data bus carries either three STS-1/TUG-3 sig-
nals, each in their own time slot, or it carries one STS-1 signal. It also outputs a 51.84 MHz low-speed clock and
sync.
The transmit side of Super Mapper drives a clock and three sync signals (SPE, J0J1V1, and V1) onto the telecom
bus. These signals control when the internal SPE mapper or one of the mate devices drives the data bus. The
Super Mapper receives an 8-bit data bus and an odd/even parity bit from the telecom bus. The data consists of the
SPE for up to three STS-1s. Also, a 51.84 MHz low-speed clock and sync are output.
26.7 SPE/AU-3 Mapper (DS3 Mapper)
The SPE mapper block is a highly configurable mapper. It operates either as an AU-3/STS-1 mapper or as a
TUG-3 mapper. In both modes, it maps/demaps data from/to either the VT mapper, the M13 MUX/deMUX, the DS3
clear channel, or the DS3 loopback channel. The SPE mapper supports numerous automatic monitoring functions
and provides interrupts to the control system, or it can be operated in a polled mode.
In TU mapping mode, the SPE mapper provides flexibility down to TUG-2 level for choosing which TUG-2s
(out of 7) are mapped/dropped into/from which TUG-3s (between 1 and 3) for generating STM-1 signals. This
allows grooming of the VTs/TUs on the STM-1 level (over all three devices). In a full STM-1 application, with two
other devices sitting on the telecom bus, care has to be taken for the provisioning of the time slots when each block
drives the telecom bus.
In DS3 mapping mode, the SPE mapper block accepts/delivers structured DS3 data from/to the M13 block or a
clear DS3 signal at 44.736 Mbits/s rate and maps/demaps it asynchronously into/from the STS-1 SPE or a TU-3.
The DS3 mapper generates a fixed pointer value of 522.