6
Agere Systems Inc.
TMXF28155 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
2 Preface
(continued)
The objective of this data sheet is to define the func-
tionality of the Super Mapper for hardware and soft-
ware developers. The information contained in this data
sheet is preliminary, and may change without notice;
the reader must therefore ascertain that the latest ver-
sion is used when a product is under development.
The latest version of this data sheet can be accessed
at: http://www.lucent.com/micro/netcom/products/
pdh.html#super_mapper.
2.1 Major Categories
This data sheet is divided into six major categories with
sub-sections as follows:
I
Features
I
Product Description
—
Features
—
Preface
—
Overview
I
Interface Specifications
—
Pin Information
—
Electrical Characteristics
—
Timing Characteristics
—
Ordering Information
I
Register Descriptions
—
Microprocessor Interface Registers
—
TMUX Registers
—
SPE Mapper Registers
—
VT/UT Mapper Registers
—
M13/M23 MUX/deMUX Registers
—
28-Channel Framer Registers
—
Cross Connect (XC) Registers
—
Digital Jitter Attenuation Registers
—
Test Pattern Generation/Detection Registers
I
Functional Descriptions
—
Microprocessor Interface Description
—
TMUX Registers Description
—
SPE Mapper Registers Description
—
VT/UT Mapper Registers Description
—
M13/M23 MUX/deMUX Registers Description
—
28-Channel Framer Registers Description
—
Cross Connect (XC) Registers Description
—
Digital Jitter Attenuation Registers Description
—
Test Pattern Generation/Detection Registers De-
scription
I
Applications
—
Application Block Diagrams and Descriptions
2.2 Naming Convention for Registers and
Parameters
There are many provisioning registers for controlling
the Super Mapper. A naming convention for all regis-
ters and parameters (bit names) is followed throughout
this data sheet. A prefix is attached to the base name
of each register or parameter, depending on which
functional section the register or parameter is associ-
ated with:
I
SMPR_, for the Microprocessor Interface
I
TMUX_, for the TMUX
I
SPE_, for the SPE Mapper
I
VT_, for the VT/VC Mapper
I
M13_, for the M13/M23 MUX/deMUX
I
FRM_, for the 28-Channel Framer
I
XC_, for the Cross Connect
I
DJA_, for the Digital Jitter Attenuator
I
TPG_ and TPM_, for the Test-Pattern Generator/
Detection
A suffix is appended to the base name of three com-
mon parameters:
I
_IS, for interrupt signal.
I
_IM, for interrupt mask.
I
_SWRS, for software reset.