TMXF28155/51 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Preliminary Data Sheet
May 2001
466
Agere Systems Inc.
20 M13/M23 MUX/DeMUX Block Functional Description
(continued)
20.7.7 FEBE
C bits 10, 11, and 12 provide a far-end block error (FEBE) indication. Each frame of the received DS3 signal is
checked for errors in the F-bit or M-bit framing sequences and for errors in the CP-bit path parity. If no errors are
found, the FEBE bits are set to 111 in the next transmitted DS3 frame. If one or more errors are detected, the FEBE
bits are transmitted as 000. The user can force the transmission of FEBE error indications by setting
M13_FEBE_ERR to 1 (
Table 277
). This causes all DS3 frames to be transmitted with the FEBE bits set to 000,
regardless of whether or not errors were detected in the received DS3 signal.
20.7.8 Terminal-to-Terminal Path Maintenance Data Link
C bits 13, 14, and 15 can be used as a 28.2 kbit/s data link. If the data link is not used, the user should set
M13_TDL_ACT to 0 (
Table 279
), which causes all ones to be transmitted. When M13_TDL_ACT = 1 and
M13_TDL_NTRNL = 0 (
Table 279
), the data transmitted on this link comes directly from the M13 input pin, pin
TDLDATA (E8). Otherwise (M13_TDL_ACT = 1 and M13_TDL_NTRNL = 1), the data link is controlled by the inter-
nal HDLC transmitter.
HDLC Transmitter.
The internal HDLC transmitter circuitry is composed of two 64-byte data buffers (registers
M13_TDL_0DATA_R[0
—
63] (
Table 298
) and M13_TDL_1DATA_R[0
—
63] (
Table 299
)), a CRC-16 frame check
sequence (FCS) generator, and control circuits. The HDLC transmitter continually outputs flag bytes (01111110)
with MSB first until the user sets M13_TDL_NTRNL_ACT to 1 (
Table 279
). Following the completion of the next flag
byte, the HDLC transmitter begins transmitting the first byte of the first data buffer (register
M13_TDL_0DATA_R[0]), which should be filled by the user with the first byte of the address field. (For LAPD mes-
sages, this byte contains the service access point identifier, the command/response bit, and a zero extended
address bit.)
Bytes from the data buffer are transmitted least significant bit (LSB) first (GR-499). The HDLC controller inserts a 0
after any sequence of five consecutive ones in the data buffer to prevent the occurrence of a flag pattern prior to the
closing flag.
Buffer Usage.
The number of bytes transmitted from the data buffers before completing the frame is controlled as
follows. M13_TDL_BUF0_END (
Table 279
) and M13_TDL_BUF1_END (
Table 279
) are two bits which indicate
whether or not the final buffer byte to be transmitted is currently in buffer 0 or buffer 1. While bytes from buffer 0 are
being transmitted, the HDLC controller checks the value of M13_TDL_BUF0_END bit. If it is 0, all bytes from buffer
0 and at least one byte from buffer 1 are transmitted. If it is 1, bytes from buffer 0 are transmitted sequentially up to
and including byte K, where M13_TDL_BYTE_END[5:0] = K (
Table 280
).
Similarly, the number of bytes transmitted from buffer 1 is controlled by the value of M13_TDL_BUF1_END and
M13_TDL_BYTE_END[5:0] bits. Bytes are transmitted alternately from buffer 0 and buffer 1 until bit
M13_TDL_BUF[0, 1]_END = 1 for the active transmission buffer and the value of bits M13_TDL_BYTE_END[5:0] is
equal to the byte number being transmitted.
When the HDLC controller completes transmission of register M13_TDL_0DATA_R[63] (the last byte of buffer 0),
the interrupt bit M13_TDL_BUF0_INT is set to 1 (
Table 217
). Similarly, the interrupt bit M13_TDL_BUF1_INT
(
Table 217
) is set after the last byte of buffer 1 is transmitted. These bits indicate that the corresponding buffer has
been emptied and is available for refilling.
The user may abort the transmission of an HDLC frame by clearing M13_TDL_NTRNL_ACT to 0 prior to complet-
ing transmission of the last byte from the data buffers. If so, the HDLC controller will stop transmission from the
buffers and send an abort byte (01111111) transmitted MSB first. The abort byte will then be followed by flag bytes
until M13_TDL_NTRNL_ACT is again set to 1, starting transmission of a new frame.