參數(shù)資料
型號(hào)： intel386 DX
廠商： Intel Corp.
英文描述： 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲(chǔ)管理)
中文描述： 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲(chǔ)管理）
文件頁數(shù)： 99/139頁
文件大?。?/td> 1587K
代理商： INTEL386 DX
Intel386
TM
DX MICROPROCESSOR
Table 6-1. Intel386
TM
DX Instruction Set Clock Count Summary
(Continued)
CLOCK COUNT
NOTES
Real
Address Protected Address Protected
Mode or
Virtual
Virtual
Address
8086
Mode
Mode
Real
INSTRUCTION
FORMAT
Mode or
Virtual
8086
Mode
Virtual
Address
Mode
ARITHMETIC
(Continued)
DIV
e
Divide (Unsigned)
Accumulator by Register/Memory
1 1 1 1 0 1 1 w mod 1 1 0
r/m
DivisorDByte
14/17
22/25
38/41
14/17
22/25
38/41
b,e
b,e
b,e
e,h
e,h
e,h
DWord
DDoubleword
IDIV
e
Integer Divide (Signed)
Accumulator By Register/Memory
1 1 1 1 0 1 1 w mod 1 1 1
r/m
DivisorDByte
19/22
27/30
43/46
19/22
27/30
43/46
b,e
b,e
b,e
e,h
e,h
e,h
DWord
DDoubleword
AAD
e
ASCII Adjust for Divide
1 1 0 1 0 1 0 1
0 0 0 0 1 0 1 0
19
19
AAM
e
ASCII Adjust for Multiply
1 1 0 1 0 1 0 0
0 0 0 0 1 0 1 0
17
17
CBW
e
Convert Byte to Word
1 0 0 1 1 0 0 0
3
3
CWD
e
Convert Word to Double Word
1 0 0 1 1 0 0 1
2
2
LOGIC
Shift Rotate Instructions
Not Through Carry
(ROL, ROR, SAL, SAR, SHL,
and
SHR)
Register/Memory by 1
1 1 0 1 0 0 0 w mod TTT
r/m
3/7
3/7
b
h
Register/Memory by CL
1 1 0 1 0 0 1 w mod TTT
r/m
3/7
3/7
b
h
Register/Memory by Immediate Count
1 1 0 0 0 0 0 w mod TTT
r/m immed 8-bit data
3/7
3/7
b
h
Through Carry
(RCL
and
RCR)
Register/Memory by 1
1 1 0 1 0 0 0 w mod TTT
r/m
9/10
9/10
b
h
Register/Memory by CL
1 1 0 1 0 0 1 w mod TTT
r/m
9/10
9/10
b
h
Register/Memory by Immediate Count
1 1 0 0 0 0 0 w mod TTT
r/m immed 8-bit data
9/10
9/10
b
h
T T T Instruction
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
ROL
ROR
RCL
RCR
SHL/SAL
SHR
SAR
SHLD
e
Shift Left Double
Register/Memory by Immediate
0 0 0 0 1 1 1 1
1 0 1 0 0 1 0 0
mod reg
r/m immed 8-bit data
3/7
3/7
Register/Memory by CL
0 0 0 0 1 1 1 1
1 0 1 0 0 1 0 1
mod reg
r/m
3/7
3/7
SHRD
e
Shift Right Double
Register/Memory by Immediate
0 0 0 0 1 1 1 1
1 0 1 0 1 1 0 0
mod reg
r/m immed 8-bit data
3/7
3/7
Register/Memory by CL
0 0 0 0 1 1 1 1
1 0 1 0 1 1 0 1
mod reg
r/m
3/7
3/7
AND
e
And
Register to Register
0 0 1 0 0 0 d w mod reg
r/m
2
2
99
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