參數(shù)資料
型號: intel386 DX
廠商: Intel Corp.
英文描述: 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理)
中文描述: 32位CHMOS微處理器集成內(nèi)存管理(32位CHMOS微處理器帶集成存儲管理)
文件頁數(shù): 106/139頁
文件大小: 1587K
代理商: INTEL386 DX
Intel386
TM
DX MICROPROCESSOR
Table 6-1. Intel386
TM
DX Instruction Set Clock Count Summary
(Continued)
CLOCK COUNT
NOTES
Real
Address
Mode or
Virtual
8086
Mode
Real
Address
Mode or
Virtual
8086
Mode
INSTRUCTION
FORMAT
Protected
Virtual
Address
Mode
Protected
Virtual
Address
Mode
INTERRUPT INSTRUCTIONS
INT
e
Interrupt:
Type Specified
1 1 0 0 1 1 0 1
type
37
b
Type 3
1 1 0 0 1 1 0 0
33
b
INTO
e
Interrupt 4 if Overflow Flag Set
1 1 0 0 1 1 1 0
If OF
e
1
If OF
e
0
35
3
b, e
b, e
3
Bound
e
Interrupt 5 if Detect Value
Out of Range
0 1 1 0 0 0 1 0
mod reg
r/m
If Out of Range
If In Range
44
10
b, e
b, e
e, g, h, j, k, r
e, g, h, j, k, r
10
Protected Mode Only (INT)
INT: Type Specified
Via Interrupt or Trap Gate
to Same Privilege Level
Via Interrupt or Trap Gate
to Different Privilege Level
From 80286 Task to 80286 TSS via Task Gate
From 80286 Task to Intel386 DX TSS via Task Gate
From 80286 Task to virt 8086 md via Task Gate
From Intel386 DX Task to 80286 TSS via Task Gate
From Intel386 DX Task to Intel386 DX TSS via Task Gate
From Intel386 DX Task to virt 8086 md via Task Gate
From virt 8086 md to 80286 TSS via Task Gate
From virt 8086 md to Intel386 DX TSS via Task Gate
From virt 8086 md to priv level 0 via Trap Gate or Interrupt Gate
59
g, j, k, r
99
282
309
226
284
311
228
289
316
119
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
INT: TYPE 3
Via Interrupt or Trap Gate
to Same Privilege Level
Via Interrupt or Trap Gate
to Different Privilege Level
From 80286 Task to 80286 TSS via Task Gate
From 80286 Task to Intel386 DX TSS via Task Gate
From 80286 Task to Virt 8086 md via Task Gate
From Intel386 DX Task to 80286 TSS via Task Gate
From Intel386 DX Task to Intel386 DX TSS via Task Gate
From Intel386 DX Task to Virt 8086 md via Task Gate
From virt 8086 md to 80286 TSS via Task Gate
From virt 8086 md to Intel386 DX TSS via Task Gate
From virt 8086 md to priv level 0 via Trap Gate or Interrupt Gate
59
g, j, k, r
99
278
305
222
280
307
224
285
312
119
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
INTO:
Via Interrupt or Trap Grate
to Same Privilege Level
Via Interrupt or Trap Gate
to Different Privilege Level
From 80286 Task to 80286 TSS via Task Gate
From 80286 Task to Intel386 DX TSS via Task Gate
From 80286 Task to virt 8086 md via Task Gate
From Intel386 DX Task to 80286 TSS via Task Gate
From Intel386 DX Task to Intel386 DX TSS via Task Gate
From Intel386 DX Gate
From virt 8086 md to 80286 TSS via Task Gate
From virt 8086 md to Intel386 DX TSS via Task Gate
From virt 8086 md to priv level 0 via Trap Gate or Interrupt Gate
59
g, j, k, r
99
280
307
224
282
309
225
287
314
119
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
g, j, k, r
106
相關(guān)PDF資料
PDF描述
Intel386 EX Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器)
INTEL386 SXSA 5-V 32-Bit Fully Static Embedded Microprocessor(5V,32位完全靜態(tài)嵌入式微處理器)
intel386 SX 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器)
INTEL386 Intel386 EX Embedded Microprocessor
Intel387 dx DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
INTEL386SX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR
INTEL387 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR
INTEL387DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR
INTEL387SX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR
INTEL387TMDX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR