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參數(shù)資料
| 型號： | intel386 DX |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理) |
| 中文描述： | 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲管理） |
| 文件頁數(shù)： | 11/139頁 |
| 文件大?。?/td> | 1587K |
| 代理商： | INTEL386 DX |
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Intel386
TM
DX MICROPROCESSOR
OF
(Overflow Flag, bit 11)
OF is set if the operation resulted in a signed
overflow. Signed overflow occurs when the
operation resulted in carry/borrow
into
the
sign bit (high-order bit) of the result but did
not result in a carry/borrow
out of
the high-
order bit, or vice-versa. For 8/16/32 bit oper-
ations, OF is set according to overflow at bit
7/15/31, respectively.
DF
(Direction Flag, bit 10)
DF defines whether ESI and/or EDI registers
postdecrement or postincrement during the
string instructions. Postincrement occurs if
DF is reset. Postdecrement occurs if DF is
set.
IF
(INTR Enable Flag, bit 9)
The IF flag, when set, allows recognition of
external interrupts signalled on the INTR pin.
When IF is reset, external interrupts signalled
on the INTR are not recognized. IOPL indi-
cates the maximum CPL value allowing alter-
ation of the IF bit when new values are
popped into EFLAGS or FLAGS.
TF
(Trap Enable Flag, bit 8)
TF controls the generation of exception 1
trap when single-stepping through code.
When TF is set, the Intel386 DX generates an
exception 1 trap after the next instruction is
executed. When TF is reset, exception 1
traps occur only as a function of the break-
point addresses loaded into debug registers
DR0–DR3.
SF
(Sign Flag, bit 7)
SF is set if the high-order bit of the result is
set, it is reset otherwise. For 8-, 16-, 32-bit
operations, SF reflects the state of bit 7, 15,
31 respectively.
ZF
(Zero Flag, bit 6)
ZF is set if all bits of the result are 0. Other-
wise it is reset.
AF
(Auxiliary Carry Flag, bit 4)
The Auxiliary Flag is used to simplify the addi-
tion and subtraction of packed BCD quanti-
ties. AF is set if the operation resulted in a
carry out of bit 3 (addition) or a borrow into bit
3 (subtraction). Otherwise AF is reset. AF is
affected by carry out of, or borrow into bit 3
only, regardless of overall operand length: 8,
16 or 32 bits.
PF
(Parity Flags, bit 2)
PF is set if the low-order eight bits of the op-
eration contains an even number of ‘‘1’s’’
(even parity). PF is reset if the low-order eight
bits have odd parity. PF is a function of only
the low-order eight bits, regardless of oper-
and size.
CF
(Carry Flag, bit 0)
CF is set if the operation resulted in a carry
out of (addition), or a borrow into (subtraction)
the high-order bit. Otherwise CF is reset. For
8-, 16- or 32-bit operations, CF is set accord-
ing to carry/borrow at bit 7, 15 or 31, respec-
tively.
Note in these descriptions, ‘‘set’’ means ‘‘set to 1,’’
and ‘‘reset’’ means ‘‘reset to 0.’’
2.3.4 Segment Registers
Six 16-bit segment registers hold segment selector
values identifying the currently addressable memory
segments. Segment registers are shown in Figure 2-
4. In Protected Mode, each segment may range in
size from one byte up to the entire linear and physi-
SEGMENT
REGISTERS
DESCRIPTOR REGISTERS (LOADED AUTOMATICALLY)
V
W
V
W
Other
Segment
15
0
Physical Base Address Segment Limit
Attributes from Descriptor
Selector
CS–
D
Selector
SS–
D
D
Selector
DS–
D D D
Selector
ES–
D D D
Selector
FS–
D D D
Selector
GS–
D D D
Figure 2-4. Intel386
TM
DX Segment Registers, and Associated Descriptor Registers
11
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Intel386 EX | Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器) |
| INTEL386 SXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| intel386 SX | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器) |
| INTEL386 | Intel386 EX Embedded Microprocessor |
| Intel387 dx | DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEL386SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR |
| INTEL387 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR |
| INTEL387DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR |
| INTEL387SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR |
| INTEL387TMDX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR |
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