參數(shù)資料
型號(hào)： intel386 DX
廠商： Intel Corp.
英文描述： 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲(chǔ)管理)
中文描述： 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲(chǔ)管理）
文件頁(yè)數(shù)： 94/139頁(yè)
文件大小： 1587K
代理商： INTEL386 DX
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)當(dāng)前第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)
Intel386
TM
DX MICROPROCESSOR
5.8 COPROCESSOR INTERFACING
The Intel386 DX provides an automatic interface for
the Intel Intel387 DX numeric floating-point coproc-
essor. The Intel387 DX coprocessor uses an I/O-
mapped interface driven automatically by the In-
tel386 DX and assisted by three dedicated signals:
BUSY
Y
, ERROR
Y
, and PEREQ.
As the Intel386 DX begins supporting a coprocessor
instruction, it tests the BUSY
Y
and ERROR
Y
sig-
nals to determine if the coprocessor can accept its
next instruction. Thus, the BUSY
Y
and ERROR
Y
inputs eliminate the need for any ‘‘preamble’’ bus
cycles for communication between processor and
coprocessor. The Intel387 DX can be given its com-
mand opcode immediately. The dedicated signals
provide instruction synchronization, and eliminate
the need of using the Intel386 DX WAIT opcode
(9Bh) for Intel387 DX coprocessor instruction syn-
chronization (the WAIT opcode was required when
8086 or 8088 was used with the 8087 coprocessor).
Custom coprocessors can be included in Intel386
DX-based systems, via memory-mapped or I/O-
mapped interfaces. Such coprocessor interfaces al-
low a completely custom protocol, and are not limit-
ed to a set of coprocessor protocol ‘‘primitives’’. In-
stead, memory-mapped or I/O-mapped interfaces
may use all applicable Intel386 DX instructions for
high-speed
coprocessor
BUSY
Y
and ERROR
Y
inputs of the Intel386 DX
may also be used for the custom coprocessor inter-
face, if such hardware assist is desired. These sig-
nals can be tested by the Intel386 DX WAIT opcode
(9Bh). The WAIT instruction will wait until the
BUSY
Y
input is negated (interruptable by an NMI or
enabled INTR input), but generates an exception 16
fault if the ERROR
Y
pin is in the asserted state
when the BUSY
Y
goes (or is) negated. If the custom
coprocessor interface is memory-mapped, protec-
tion of the addresses used for the interface can be
provided with the Intel386 DX on-chip paging or
communication.
The
segmentation mechanisms. If the custom interface
is I/O-mapped, protection of the interface can be
provided with the Intel386 DX IOPL (I/O Privilege
Level) mechanism.
The Intel387 DX numeric coprocessor interface is
I/O mapped as shown in Table 5-11. Note that the
Intel387 DX coprocessor interface addresses are
beyond the 0h-FFFFh range for programmed I/O.
When the Intel386 DX supports the Intel387 DX co-
processor, the Intel386 DX automatically generates
bus cycles to the coprocessor interface addresses.
Table 5-11. Numeric Coprocessor
Port Addresses
Address in
Intel386
TM
DX
I/O Space
Intel387
TM
DX
Coprocessor
Register
800000F8h
Opcode Register
(32-bit port)
800000FCh
Operand Register
(32-bit port)
To correctly map the Intel387 DX coprocessor regis-
ters to the appropriate I/O addresses, connect the
Intel387 DX coprocessor CMD0
Y
pin directly to the
A2 output of the Intel386 DX.
5.8.1 Software Testing for
Coprocessor Presence
When software is used to test for coprocessor (In-
tel387 DX) presence, it should use only the following
coprocessor opcodes: FINIT, FNINIT, FSTCW mem,
FSTSW mem, FSTSW AX. To use other coproces-
sor opcodes when a coprocessor is known to be not
present, first set EM
e
1 in Intel386 DX CR0.
94
相關(guān)PDF資料
PDF描述
Intel386 EX Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器)
INTEL386 SXSA 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器)
intel386 SX 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器)
INTEL386 Intel386 EX Embedded Microprocessor
Intel387 dx DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
INTEL386SX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR
INTEL387 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR
INTEL387DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR
INTEL387SX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR
INTEL387TMDX 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*