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參數(shù)資料
| 型號： | intel386 DX |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理) |
| 中文描述： | 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲管理） |
| 文件頁數(shù)： | 15/139頁 |
| 文件大?。?/td> | 1587K |
| 代理商： | INTEL386 DX |
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Intel386
TM
DX MICROPROCESSOR
Table 2-1. Register Usage
Use in
Real Mode
Use in
Use in
Register
Protected Mode
Virtual 8086 Mode
Load
Store
Load
Store
Load
Store
General Registers
Yes
Yes
Yes
Yes
Yes
Yes
Segment Registers
Yes
Yes
Yes
Yes
Yes
Yes
Flag Register
Yes
Yes
Yes
Yes
IOPL
*
IOPL
*
Control Registers
Yes
Yes
PL
e
0
PL
e
0
No
Yes
GDTR
Yes
Yes
PL
e
0
Yes
No
Yes
IDTR
Yes
Yes
PL
e
0
Yes
No
Yes
LDTR
No
No
PL
e
0
Yes
No
No
TR
No
No
PL
e
0
Yes
No
No
Debug Control
Yes
Yes
PL
e
0
PL
e
0
No
No
Test Registers
Yes
Yes
PL
e
0
PL
e
0
No
No
NOTES:
PL
e
0: The registers can be accessed only when the current privilege level is zero.
*
IOPL: The PUSHF and POPF instructions are made I/O Privilege Level sensitive in Virtual 8086 Mode.
5) However, registers which have been previ-
ously stored may be reloaded without mask-
ing.
Depending upon the values of undefined regis-
ter bits will make your software dependent upon
the unspecified Intel386 DX handling of these
bits. Depending on undefined values risks mak-
ing your software incompatible with future proc-
essors that define usages for the Intel386 DX-
undefined bits. AVOID ANY SOFTWARE DEPEN-
DENCE UPON THE STATE OF UNDEFINED In-
tel386 DX REGISTER BITS.
2.4 INSTRUCTION SET
2.4.1 Instruction Set Overview
The instruction set is divided into nine categories of
operations:
Data Transfer
Arithmetic
Shift/Rotate
String Manipulation
Bit Manipulation
Control Transfer
High Level Language Support
Operating System Support
Processor Control
These Intel386 DX instructions are listed in Table
2-2.
All Intel386 DX instructions operate on either 0, 1, 2,
or 3 operands; where an operand resides in a regis-
ter, in the instruction itself, or in memory. Most zero
operand instructions (e.g. CLI, STI) take only one
byte. One operand instructions generally are two
bytes long. The average instruction is 3.2 bytes long.
Since the Intel386 DX has a 16-byte instruction
queue, an average of 5 instructions will be pre-
fetched. The use of two operands permits the follow-
ing types of common instructions:
Register to Register
Memory to Register
Immediate to Register
Register to Memory
Immediate to Memory.
The operands can be either 8, 16, or 32 bits long. As
a general rule, when executing code written for the
Intel386 DX (32-bit code), operands are 8 or 32 bits;
when executing existing 80286 or 8086 code (16-bit
code), operands are 8 or 16 bits. Prefixes can be
added to all instructions which override the default
length of the operands, (i.e. use 32-bit operands for
16-bit code, or 16-bit operands for 32-bit code).
For a more elaborate description of the instruction
set, refer to the Intel386 DX Programmer’s Refer-
ence Manual.
15
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Intel386 EX | Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器) |
| INTEL386 SXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| intel386 SX | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器) |
| INTEL386 | Intel386 EX Embedded Microprocessor |
| Intel387 dx | DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEL386SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR |
| INTEL387 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR |
| INTEL387DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR |
| INTEL387SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR |
| INTEL387TMDX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR |
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