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參數(shù)資料
| 型號： | intel386 DX |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理) |
| 中文描述： | 32位CHMOS微處理器集成內(nèi)存管理（32位CHMOS微處理器帶集成存儲管理） |
| 文件頁數(shù)： | 40/139頁 |
| 文件大?。?/td> | 1587K |
| 代理商： | INTEL386 DX |
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Intel386
TM
DX MICROPROCESSOR
4.3.4.4 LDT DESCRIPTORS (S
e
0, TYPE
e
2)
LDT descriptors (S
e
0 TYPE
e
2) contain informa-
tion about Local Descriptor Tables. LDTs contain a
table of segment descriptors, unique to a particular
task. Since the instruction to load the LDTR is only
available at privilege level 0, the DPL field is ignored.
LDT descriptors are only allowed in the Global De-
scriptor Table (GDT).
4.3.4.5 TSS DESCRIPTORS (S
e
0,
TYPE
e
1, 3, 9, B)
A Task State Segment (TSS) descriptor contains in-
formation about the location, size, and privilege level
of a Task State Segment (TSS). A TSS in turn is a
special fixed format segment which contains all the
state information for a task and a linkage field to
permit nesting tasks. The TYPE field is used to indi-
cate whether the task is currently BUSY (i.e. on a
chain of active tasks) or the TSS is available. The
TYPE field also indicates if the segment contains a
80286 or an Intel386 DX TSS. The Task Register
(TR) contains the selector which points to the cur-
rent Task State Segment.
4.3.4.6 GATE DESCRIPTORS (S
e
0,
TYPE
e
4–7, C, F)
Gates are used to control access to entry points
within the target code segment. The various types of
gate descriptors are
call
gates,
task
gates,
inter-
rupt
gates, and
trap
gates. Gates provide a level of
indirection between the source and destination of
the control transfer. This indirection allows the proc-
essor to automatically perform protection checks. It
also allows system designers to control entry points
to the operating system. Call gates are used to
change privilege levels (see section 4.4
Protection
),
task gates are used to perform a task switch, and
interrupt and trap gates are used to specify interrupt
service routines.
Figure 4-8 shows the format of the four types of gate
descriptors. Call gates are primarily used to transfer
program control to a more privileged level. The call
gate descriptor consists of three fields: the access
byte, a long pointer (selector and offset) which
points to the start of a routine and a word count
which specifies how many parameters are to be cop-
ied from the caller’s stack to the stack of the called
routine. The word count field is only used by call
gates when there is a change in the privilege level,
other types of gates ignore the word count field.
Interrupt and trap gates use the destination selector
and destination offset fields of the gate descriptor as
a pointer to the start of the interrupt or trap handler
routines. The difference between interrupt gates and
trap gates is that the interrupt gate disables inter-
rupts (resets the IF bit) while the trap gate does not.
31
24
16
8
5
0
SELECTOR
OFFSET 15 . . . 0
0
WORD
COUNT
a
4
4 . . . 0
OFFSET 31 . . . 16
P
DPL
0
TYPE
0
0
0
Gate Descriptor Fields
Name
Type
Value
4
5
6
7
C
E
F
0
1
Description
80286 call gate
Task gate (for 80286 or Intel386
TM
DX task)
80286 interrupt gate
80286 trap gate
Intel386
TM
DX call gate
Intel386
TM
DX interrupt gate
Intel386
TM
DX trap gate
Descriptor contents are not valid
Descriptor contents are valid
P
DPLDleast privileged level at which a task may access the gate. WORD COUNT 0–31Dthe number of parameters to copy from caller’s stack
to the called procedure’s stack. The parameters are 32-bit quantities for Intel386
TM
DX gates, and 16-bit quantities for 80286 gates.
DESTINATION
SELECTOR
16-bit
selector
Selector to the target code segment
or
Selector to the target task state segment for task gate
DESTINATION
OFFSET
offset
16-bit 80286
32-bit Intel386
TM
DX
Entry point within the target code segment
Figure 4-8. Gate Descriptor Formats
40
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Intel386 EX | Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器) |
| INTEL386 SXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| intel386 SX | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器) |
| INTEL386 | Intel386 EX Embedded Microprocessor |
| Intel387 dx | DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEL386SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR |
| INTEL387 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR |
| INTEL387DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR |
| INTEL387SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR |
| INTEL387TMDX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR |
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