參數(shù)資料
型號: 82439TX
廠商: INTEL CORP
元件分類: 存儲控制器/管理單元
英文描述: System Controller(系統(tǒng)控制器)
中文描述: 256M X 8, DRAM CONTROLLER, PBGA324
封裝: BGA-324
文件頁數(shù): 69/83頁
文件大?。?/td> 461K
代理商: 82439TX
E
82439TX (MTXC)
69
PRELIMINARY
CPU/PCI Priority Queue
PCI Priority Queue
CPU
PCI
PCI
PCI
PHLD#
REQ0#
REQ1#
PHLD#
REQ2#
REQ3#
mtxc_07
NOTES:
1.
In the PCI Priority Queue, the last agent granted is always dropped to the bottom of the queue for the next arbitration
cycle, but the order of the chain is always preserved.
In the PCI Priority Queue, if PHLD is at the bottom of the queue, the upper PHLD slot is masked. This prevents back-to-
back PHLD grants, if other PCI request are pending.
In the CPU/PCI priority Queue, the CPU is granted high priority status after 3 consecutive PCI grants. If three consecutive
PCI grants have not been counted down, then the CPU can be granted the bus as the low priority agent.
2.
3.
Figure 11. Arbitration Priority Rotation
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