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參數(shù)資料
| 型號： | 82439TX |
| 廠商： | INTEL CORP |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | System Controller(系統(tǒng)控制器) |
| 中文描述： | 256M X 8, DRAM CONTROLLER, PBGA324 |
| 封裝： | BGA-324 |
| 文件頁數(shù)： | 33/83頁 |
| 文件大?。?/td> | 461K |
| 代理商： | 82439TX |
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E
3.1.20.
82439TX (MTXC)
33
PRELIMINARY
DRAMT
DRAM TIMING REGISTER
Address Offset:
Default Value:
Access:
58h
00h
Read/Write
This 8-bit register controls main memory DRAM timings. For SDRAM specific timing control, see the SDRAMC
timing register definition.
Bit
Description
7
Reserved.
6:5
DRAM Read Burst Timing (DRBT).
The DRAM read burst timings are controlled by the DRBT field.
Slower rates may be required in certain system designs to support loose layouts or slower
memories. Most system designs will be able to use one of the faster burst mode timings. The timing
used depends on the type of DRAM on a per-bank basis, as indicated by the DRT register.
The x322 timings for EDO Burst rate should be used only when the Fast EDO Path Select (FEPS)
bit is set to 1 and the timings for the EDO Burst rate for X222 have a negative margin. This forces
the MXS to be negated after the leadoff; thus, selecting the fast path for the leadoff and the slow path
for the burst cycles.
When FEPS=1 and the EDO Burst rate is set to x222, the EDO read cycle is selected through the
fast path for both leadoff and the burst cycles.
When FEPS=0 and the EDO Burst rate is set to x222, the EDO read cycle is selected through the
slow path for both leadoff and the burst cycles.
DRBT
EDO Burst Rate
FPM Burst Rate
00
x444
x444
01
x333
x444
10
x222
x333
11
Reserved
Reserved
4:3
DRAM Write Burst Timing (DWBT).
The DRAM write burst timings are controlled by the DWBT
field. Slower rates may be required in certain system designs to support loose layouts or slower
memories. Most system designs will be able to use one of the faster burst mode timings.
DWBT
EDO/FPM Burst Rate
00
x444
01
x333
DWBT
10
11
EDO/FPM Burst Rate
x222
Reserved
2
Reserved.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82443MX | PCIset |
| 82443ZX | Intel㈢ 440ZX AGPset: Host Bridge/Controller |
| 82451NX | Intel 450NX PCIset |
| 82452NX | Intel 450NX PCIset |
| 82453NX | Intel 450NX PCIset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82439TXC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER (TXC) |
| 8243-A-0632-0 | 制造商:AMATOM ELECTRONIC HARDWARE 功能描述: |
| 8243-W | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
| 8243-W X(25) | 功能描述:化學(xué)物質(zhì) OPTICAL WIPE 25 PER BOX RoHS:否 制造商:3M Electronic Specialty 產(chǎn)品:Adhesives 類型:Epoxy Compound 大小:1.7 oz 外殼:Plastic Tube |
| 8243-WX25 | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
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