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參數(shù)資料
| 型號： | 82439TX |
| 廠商： | INTEL CORP |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | System Controller(系統(tǒng)控制器) |
| 中文描述： | 256M X 8, DRAM CONTROLLER, PBGA324 |
| 封裝： | BGA-324 |
| 文件頁數(shù)： | 43/83頁 |
| 文件大?。?/td> | 461K |
| 代理商： | 82439TX |
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E
3.1.27.
82439TX (MTXC)
43
PRELIMINARY
SMRAMC
SYSTEM MANAGEMENT RAM CONTROL REGISTER
Address Offset:
Default Value:
Access:
72h
02h
Read/Write
The SMRAMC register controls how accesses to Compatible and Extended SMRAM spaces are treated. MTXC
supports two types of SMRAM memory: Compatible and Extended. The Open, Close, and Lock bits function
only when G_SMRAME bit is set to a 1. Also, the OPEN bit be reset before the LOCK bit is set.
Bit
Description
7
Reserved.
6
SMM Space Open (D_OPEN)
.
When D_OPEN=1 and D_LCK=0, the SMM space DRAM is made
visible even when SMIACT# is negated. This is intended to help BIOS initialize SMM space.
Software should ensure that D_OPEN=1 is mutually exclusive with D_CLS=1. When D_LCK is set
to a 1, D_OPEN is reset to 0 and becomes read only.
5
SMM Space Closed (D_CLS)
.
When D_CLS=1, SMM space DRAM is not accessible to data
references, even if SMIACT# is asserted. Code references may still access SMM space DRAM.
This will allow SMM software to reference “through” SMM space to update the display, even when
SMM space is mapped over the VGA range. Software should ensure that D_OPEN=1 is mutually
exclusive with D_CLS=1.
4
SMM Space Locked (D_LCK)
.
When D_LCK is set to 1, D_OPEN is reset to 0 and both D_LCK
and D_OPEN become read only. D_LCK can be set to 1 via a normal configuration space write but
can only be cleared by a power-on reset. The combination of D_LCK and D_OPEN provide
convenience with security. The BIOS can use the D_OPEN function to initialize SMM space and
then use D_LCK to “l(fā)ock down” SMM space in the future so that no application software (or BIOS
itself) can violate the integrity of SMM space, even if the program has knowledge of the D_OPEN
function.
3
Global SMRAM Enable (G_SMRAME)
. If set to a 1, then Compatible SMRAM functions is enabled,
providing 128 KB of DRAM accessible at the A0000h address while in SMM (ADS# with SMIACT#).
To enable Extended SMRAM function this bit has be set to 1. Refer to the section on SMM for more
details.
2:0
Compatible SMM Space Base Segment (C_BASE_SEG).
This field programs the location of SMM
space. SMM DRAM is not remapped. It is simply “made visible” if the conditions are right to access
SMM space; otherwise, the access is forwarded to PCI. C_BASE_SEG=010 selects the SMM space
as A0000–BFFFFh. All other values are reserved. PCI initiators are not allowed to access to SMM
space. These bits are hardwired to 010.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82443MX | PCIset |
| 82443ZX | Intel㈢ 440ZX AGPset: Host Bridge/Controller |
| 82451NX | Intel 450NX PCIset |
| 82452NX | Intel 450NX PCIset |
| 82453NX | Intel 450NX PCIset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82439TXC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER (TXC) |
| 8243-A-0632-0 | 制造商:AMATOM ELECTRONIC HARDWARE 功能描述: |
| 8243-W | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
| 8243-W X(25) | 功能描述:化學(xué)物質(zhì) OPTICAL WIPE 25 PER BOX RoHS:否 制造商:3M Electronic Specialty 產(chǎn)品:Adhesives 類型:Epoxy Compound 大小:1.7 oz 外殼:Plastic Tube |
| 8243-WX25 | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
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