- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378215 > 82439TX (INTEL CORP) System Controller(系統(tǒng)控制器) PDF資料下載
參數(shù)資料
| 型號： | 82439TX |
| 廠商： | INTEL CORP |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | System Controller(系統(tǒng)控制器) |
| 中文描述： | 256M X 8, DRAM CONTROLLER, PBGA324 |
| 封裝： | BGA-324 |
| 文件頁數(shù)： | 18/83頁 |
| 文件大?。?/td> | 461K |
| 代理商： | 82439TX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
82439TX (MTXC)
E
18
PRELIMINARY
3.0.
REGISTER DESCRIPTION
The MTXC contains two sets of software accessible registers (I/O Mapped and PCI configuration registers),
accessed via the Host CPU I/O address space. The I/O mapped registers control access to PCI configuration
space. Configuration registers residing in PCI configuration space used to specify PCI configuration, DRAM
configuration, cache configuration, operating parameters and optional system features.
The MTXC internal registers (both I/O Mapped and PCI Configuration registers) are only accessible by the Host
CPU and cannot be accessed by PCI masters. The registers can be accessed as Byte, Word (16-bit), or DWord
(32-bit) quantities, with the exception of CONFADD, which can only be accessed as a DWord. All multi-byte
numeric fields use “l(fā)ittle-endian” ordering (i.e., lower addresses contain the least significant parts of the field).
The following nomenclature is used for access attributes:
RO
READ ONLY
. If a register is read only, writes to this register have no effect.
R/W
READ/WRITE
. A register with this attribute can be read and written.
R/WC
READ/WRITE CLEAR
. A register bit with this attribute can be read and written. However, a write of
1 clears (sets to 0) the corresponding bit and a write of 0 has no effect.
Some of the MTXC registers described in this section contain reserved bits. Software must deal correctly with
fields that are reserved. On reads, software must use appropriate masks to extract the defined bits and not rely
on reserved bits being any particular value. On writes, software must ensure that the values of reserved bit
positions are preserved. That is, the values of reserved bit positions must first be read, merged with the new
values for other bit positions and then written back.
In addition to reserved bits within a register, the MTXC contains address locations in the PCI configuration space
that are marked “Reserved” (Table 3). The MTXC responds to accesses to these address locations by
completing the Host cycle and returning a value of zero. The registers marked as “Undefined” will return a non-
zero value and are defined as read only. Software should not write to reserved or undefined MTXC configuration
locations in the device-specific region (above address 3Fh).
Upon RESET, the MTXC sets its internal configuration registers to predetermined
default
states. The default
state represents the minimum functionality feature set required to successfully bring up the system. Hence, it
does not represent the optimal system configuration. It is the responsibility of the system initialization software
(usually BIOS) to properly determine the DRAM configurations, cache configuration, operating parameters and
optional system features that are applicable, and to program the MTXC registers accordingly.
3.1.
I/O Mapped Registers
The MTXC contains three registers that reside in the CPU I/O address space—the Configuration Address
(CONFADD) Register, the Configuration Data (CONFDATA) Register, and the PM2 Register Block. The
Configuration Address Register enables/disables the configuration space and determines what portion of
configuration space is visible through the Configuration Data window.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82443MX | PCIset |
| 82443ZX | Intel㈢ 440ZX AGPset: Host Bridge/Controller |
| 82451NX | Intel 450NX PCIset |
| 82452NX | Intel 450NX PCIset |
| 82453NX | Intel 450NX PCIset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 82439TXC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:INTEL 430HX PCISET 82439HX SYSTEM CONTROLLER (TXC) |
| 8243-A-0632-0 | 制造商:AMATOM ELECTRONIC HARDWARE 功能描述: |
| 8243-W | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
| 8243-W X(25) | 功能描述:化學(xué)物質(zhì) OPTICAL WIPE 25 PER BOX RoHS:否 制造商:3M Electronic Specialty 產(chǎn)品:Adhesives 類型:Epoxy Compound 大小:1.7 oz 外殼:Plastic Tube |
| 8243-WX25 | 功能描述:WIPE OPTICAL INDIVIDUAL PACKS RoHS:是 類別:靜電控制，ESD，無塵室產(chǎn)品 >> 處理劑，清潔劑，擦拭布 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 處理劑/清潔劑類型:清潔布 使用:電子設(shè)備 技術(shù)規(guī)格:無絨毛，微纖維 數(shù)量:100（12" L x 12" W） 包裝:袋 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。