參數(shù)資料
型號: W83C554F
英文描述: W83C554F Highly Integrated System I/O Controller for Power PC TM (South Bridge) & UltraDMA/33 IDE Controller QFP 208
中文描述: W83C554F高度集成的系統(tǒng)的I / O控制器的Power PC商標(biāo)(南橋)
文件頁數(shù): 93/159頁
文件大?。?/td> 3991K
代理商: W83C554F
W83C553F
Scatter/Gather Interrupt Status Register (default = 00h)
Type:
Read only
Bit Description:
Bits [7:5]:
Channel [7:5] Interrupt Status. When one of these bits is set to a 1b, Channels 7 through 5
have an interrupt due to a Scatter/Gather transfer; otherwise these bits are set to 0b.
Bit [4]
Reserved
Bits [3:0]:
Channel [3:0] Interrupt Status. When one of these bits is set to a 1b, Channels 3 through 0
have an interrupt due to a Scatter/Gather transfer; otherwise these bits are set to 0b.
Electrical Specifications
WINBOND SYSTEMS LABORATORY
90
Scatter/Gather Interrupt Status Register
I/O Address: 40Ah Read
Bit
[7:5] 4
[3:0]
Channel Interrupt
Reserved
Channel Interrupt
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