參數(shù)資料
型號: W83C554F
英文描述: W83C554F Highly Integrated System I/O Controller for Power PC TM (South Bridge) & UltraDMA/33 IDE Controller QFP 208
中文描述: W83C554F高度集成的系統(tǒng)的I / O控制器的Power PC商標(biāo)(南橋)
文件頁數(shù): 61/159頁
文件大小: 3991K
代理商: W83C554F
W83C553F
4.1.2
Electrical Specifications
WINBOND SYSTEMS LABORATORY
58
Function 0 Control Registers
PCI Control Register (default = 20h)
Type:
Read/Write
Bit Description
:
Bit 7:
Reserved. This read only bit is set to "0".
Bit 6:
Reserved.
Bit 5:
IAE. Interrupt Acknowledge Enable. Setting this bit allows the W83C553F chip to respond to
the interrupt acknowledge command. This bit is active after reset.
Bit 4:
Reserved. This read only bit is set to "0".
Bit 3:
ESDP. Early Subtractive Decoding Point. Setting this bit will move the subtractive decoding
point one PCI clock earlier from "slow" to "medium" timing.
Bit 2:
PWE. Post Write Enable. Setting this bit will allow PCI memory write cycles to the ISA bus to
be posted.
Bit 1:
RETRYE. Retry Enable. When this bit is set to "1", PCI slave cycles are retried when the
internal bus is busy. When this bit is reset to "0" and the internal bus is busy, a PCI slave cycle
will be held in wait states until the bus becomes idle and the access completes. The default
state of this bit after a hardware reset is "0".
Bit 0:
PCI NMI Enable. When set, PCI error status bits in the Status Register (except SSE) will
generate an NMI. Defaults to "0".
相關(guān)PDF資料
PDF描述
W83L519D Peripheral Miscellaneous
W86C451 UART
W86C452 UART
W86F3448D LC86F3548A
W86F3448M LC86F3548A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W83C554FY 制造商:Nuvoton Technology Corp 功能描述:I/O Controller Phase Controller 制造商:Nuvoton Technology 功能描述:I/O Controller Phase Controller
W83E14 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:SYSMAC-C20 MANUAL DX CODE ZA
W83L177R 制造商:WINBOND 制造商全稱:Winbond 功能描述:100MHZ 2-DIMM SDRAM BUFFER FOR NOTEBOOK
W83L197R-16 制造商:WINBOND 制造商全稱:Winbond 功能描述:2-CHIP 100MHZ CLOCK FOR BX NOTEBOOK
W83L351 制造商:WINBOND 制造商全稱:Winbond 功能描述:ExpressCard⑩ Power Interface Switch