參數(shù)資料
型號: W83C554F
英文描述: W83C554F Highly Integrated System I/O Controller for Power PC TM (South Bridge) & UltraDMA/33 IDE Controller QFP 208
中文描述: W83C554F高度集成的系統(tǒng)的I / O控制器的Power PC商標(biāo)(南橋)
文件頁數(shù): 114/159頁
文件大?。?/td> 3991K
代理商: W83C554F
W83C553F
Electrical Specifications
WINBOND SYSTEMS LABORATORY
111
Table 4-2
.
Organization of IDE Control Registers
Address
43h-40h
47h-44h
4Bh-48h
4Fh-4Ch
53h-50h
7Bh-54h
7Fh-7Ch
FFh-80h
All reserved bits and bytes return a logic 0 when read. All reserved bytes written will execute normal PCI cycles, but will not
affect the operation or device registers.
Internal register information for the W83C553F SIO is organized as follows:
Register name and Index value offset from base address.
Function of the signal.
Type (Read and/or Write).
Bit description.
Register Bits
16
31
IDE Control/Status Register
24
23
15
8
7
0
Port 0 Drive 0 Control Register
Port 0 Drive 1 Control Register
Port 1 Drive 0 Control Register
Port 1 Drive 1 Control Register
Reserved (00000000h)
Reserved
Reserved (00000000h)
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