參數(shù)資料
型號(hào)： VMX1C1020
廠商： Electronic Theatre Controls, Inc.
英文描述： Versa Mix 8051 Mixed-Signal MCU
中文描述： 反之亦然混合8051混合信號(hào)微控制器
文件頁數(shù)： 57/80頁
文件大?。?/td> 3605K
代理商： VMX1C1020
VMX51C1020
_________________________________________________________________________________________________
www.ramtron.com
page 57 of 80
Analog Signal Path
The VMX51C1020 implements a complete
single chip acquisition system by integrating the
following analog peripherals:
o
12-bit A/D converter having 4 external
inputs as well as 3 internal connections
to the Operational amplifier and Current
source input and output for a
total of 7
inputs
. The ADC conversion rate is
programmable up to 10KHz
o
Internal Bandgap reference and PGA
o
1 Programmable current source
o
2 Digital potentiometers
o
1 Digital switch
The following figure provides a block diagram of
the VMX51C1020’s analog peripherals and their
connection.
F
IGURE
35:
A
NALOG
S
IGNAL
P
ATH OF THE
VMX51C1020
200mV
800mV
AIN0
AIN1
AIN2
AIN3
PGA
XTVREF
RESERVED
ISRCIN
OPOUT
ISRCIN
ISRCOUT/TA
A/D
POT1
POT2
BANDGAP
Reserved
SW1
OPOUT
ISRCOUT
AIN0
AIN2
AIN3
VBGAP
T
The on-chip calibrated bandgap or the external
reference provides the basis for all derived on-
chip voltages. These signals serve as reference
for the ADC and the current source.
Analog Peripheral Power Control
Selection of the internal/ external reference, the
multiplexer’s current source drive, ADC control,
and the respective power downs for these
peripherals
are
controlled
ANALOGPWREN SFR registers.
via
the
Internal Reference and PGA
The VMX51C1020 provides a temperature
calibrated internal bandgap reference coupled
with a programmable gain amplifier.
The programmable gain amplifier’s role is to
amplify the bandgap output to 2.7 volts and
provide the drive required for the ADC reference
input and current source.
Both the bandgap and the PGA are calibrated
during
production
and
calibration registers are automatically loaded
with the appropriate calibration vectors when the
device is reset.
The bandgap and PGA calibration vectors are
stored into the BGAPCAL and PGACAL SFR
registers when a reset occurs. It is possible for
the user program to overwrite the contents of
those registers.
T
ABLE
91:
(BGAPCAL)
B
AND
-
GAP
C
ALIBRATION
V
ECTOR
R
EGISTER
-
SFR
B3
H
7
6
5
4
BGAPCAL [7:0]
Bit
Mnemonic
Function
7:0
BGAPCAL
Band-gap data calibration
T
ABLE
92:
(PGACAL)
PGA
C
ALIBRATION
V
ECTOR
R
EGISTER
-
SFR
B4
H
7
6
5
4
PGACAL [7:0]
Bit
Mnemonic
Function
7:0
PGACAL
8 MSBs of PGA Calibration
Vector (LSBit is on ISRCCAL1)
Using the VMX51C1020 Internal
Reference
their
associated
3
2
1
0
3
2
1
0
The configuration and setup up of the
VMX51C1020’s internal reference is done by
setting bits 0 and 1 of the ANALOGPWREN
register to 1. This powers on the bandgap and
the PGA, respectively.
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