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| 型號： | VMX1C1020 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Versa Mix 8051 Mixed-Signal MCU |
| 中文描述： | 反之亦然混合8051混合信號微控制器 |
| 文件頁數(shù)： | 27/80頁 |
| 文件大?。?/td> | 3605K |
| 代理商： | VMX1C1020 |
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VMX51C1020
_________________________________________________________________________________________________
www.ramtron.com
page 27 of 80
as an 8-bit counter, with automatic reload of the
start value. The LSB of the Timer register, TLx,
is the counter itself and the MSB portion of the
Timer, THx, stores the timer reload value.
Mode 2’s counter control is the same as for
Mode 0 and Mode 1. However, in Mode 2, when
TLx rolls over from FFh, the value stored in THx
is reloaded into TLx.
F
IGURE
18 :
T
IMER
0
M
ODE
2
÷12
P3.2 - T0IN
CT0 = 0
CT0 = 1
TR0
GATE0
0
1
0
7
TH0
SYSCLK
TF0
INT
0
7
INT0
TL0
F
IGURE
19:
T
IMER
1
M
ODE
2
÷12
P3.5 - T1IN
CT1 = 0
CT1 = 1
TR1
GATE1
0
1
0
7
TH1
SYSCLK
TF1
To UART0
INT
0
7
INT1
TL1
The Timer0 and Timer1 overflow rate in Mode 2
can be calculated using the following equations:
Timer 0, Timer 1: Mode 2 - Overflow Rate (Hz)
CTx = 0
Timer overflow rate (Hz) = f
_________
12 x [256-(THx)]
CTx = 1
Timer overflow rate (Hz) = __ f
________
[256--(THx)]
Using Timer1 as Baud Rate generator
Using Timer1 in mode 2 is recommended as the
best approach when using Timer1 as the
UART0 baud rate generator.
Mode 3 (2 x 8-bit)
In Mode 3, Timer0 operates as two 8-bit
counters and Timer1 stops counting and holds
its value.
F
IGURE
20:
T
IMER
0,
T
IMER
1
STRUCTURE IN
M
ODE
3
SYSCLK
÷12
P3.2-T0IN
CT0 = 0
CT0 = 1
TR0
GATE0
INT0
0
1
TR1
0
7
TH0
CLK
0
7
TL0
CLK
TF0
TF1
INT
INT
To UART0
The Timer0 overflow rate in Mode 3 can be
calculated by using following equations:
Timer 0, Timer 1: Mode 3 - Overflow Rate (Hz)
TH0, CTx = 0 or 1
Timer overflow rate (Hz) = f
SYSCLK
_____
12 x 256
TL0, CTx = 0
Timer overflow rate (Hz) = f
SYSCLK
_____
12 x 256
TL0, CTx = 1
Timer overflow rate (Hz) = __ f
_____
256
In Mode 3, the values present in the TH1 and
TL1 registers, as well as the value of the GATE1
and CT1 control bits, have no impact on the
Timer operation.
Timer0 & Timer1 Interrupts
Timer0 and Timer1 have a dedicated interrupt
vectors located at:
o
000Bh
for the
Timer 0
o
001Bh
for the
Timer 1
The natural priority of Timer0 is higher than that
of Timer1.
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