
VMX51C1020
The P3PINCFG register controls I/O access to
UART0, the I2C interface, capture compare
input0 and 1, Timer 0 and Timer 1 inputs as well
as defines the direction of P3 when used as
general purpose I/O
T
ABLE
18:
(P3PINCFG)
P
ORT
3
P
ORT
C
ONFIGURATION
R
EGISTER
-
SFR
9E
H
7
6
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5
4
P3.7/MSCLEN
P3.6/MSDAEN
P3.5/T1INE
N
P3.4/CCU1E
N
3
2
1
0
P3.3/CCU0EN
P3.2/T0INEN
P3.1/RX0EN
P3.0/TX0EN
Bit
7
Mnemonic
Function
0: General purpose input
1: General purpose output or
Master I2C SCL output
When using the I2C you must
set this bit to 1.
0: General purpose input
1: General purpose output or
Master I2C SDA
When using the I2C you must
set this bit to 1.
0: General purpose input or
Timer1 Input
1: General purpose output
When using Timer 1 you must
set this bit to 0.
0: General purpose input or
CCU1 Input
1: General purpose output
When using the Compare and
Capture unit you must set this
bit to 0.
0: General purpose input or
CCU0 Input
1: General purpose output
When using the Compare and
Capture unit you must set this
bit to 0.
0: General purpose input or
Timer 0 Input
1: General purpose output
When using Timer 0 you must
set this bit to 0.
0: General purpose input or
UART0 Rx
1: General purpose output
When using UART0 you must
set this bit to 0.
0: General purpose input
1: General purpose output or
UART0 Tx
When using UART0 you must
set this bit to 1.
P3.7/MSCLEN
6
P3.6/MSDAEN
5
P3.5/T1INEN
4
P3.4/CCU1EN
3
P3.3/CCU0EN
2
P3.2/T0INEN
1
P3.1/RX0EN
0
P3.0/TX0EN
Using General Purpose I/O Ports
The VMX51C1020’s 28 I/Os are grouped into
four ports. For each port an SFR register
location is defined. Those registers are bit
addressable providing the ability to control the
I/O lines individually.
When the port pin configuration register value
defines the pin as an output, the value written
into the port register will be reflected at the pin
level.
Reading the I/O pin configured as input is done
by reading the contents of its associated port
register.
T
ABLE
19:
P
ORT
0
-
SFR
80
H
7
6
5
4
P0 [7:0]
P
ORT
1
-
SFR
90
H
7
6
5
4
P1 [7:0]
P
ORT
2
-
SFR
A0
H
7
6
5
4
P2 [7:0]
P
ORT
3
-
SFR
B0
H
7
6
5
4
P3 [7:0]
Bit
Mnemonic
Function
7-0
P0, 1, 2, 3
When the Port is configured as an
output, setting a port pin to 1 will
make the corresponding pin to
output logic high.
When set to 0, the corresponding
pin will set a logic low.
I/O usage example
3
2
1
0
3
2
1
0
3
2
1
0
3
2
1
0
The following example demonstrates the configuration of the VMX51C1020 I/Os.
//---------------------------------------------------------------------------
//This example continuously reads the P0 and writes its contents into //P1 and it
toggle P2 and P3.
//---------------------------------------------------------------------------
#pragma TINY
#pragma UNSIGNEDCHAR
#include <VMIXReg.h>
at 0x0000 void main (void)
{
DIGPWREN = 0x80;
// Enable Timer 2 to activate P1
//Output
// Configure all P0 as Input
//Configure P1 as Output
//Configure P2 as Output
//Configure P3 as Output
P1PINCFG = 0x00;
P1PINCFG = 0xFF;
P2PINCFG = 0xFF;
P3PINCFG = 0xFF;
while(1)
{
P1 = P0;
P2 = ~P2;
P3 = ~P3;
}
}//end of main() function
Using Port1.0-3 as General Purpose
Output
//Write P0 into P1
//Toggle P2 & P3
Port1.0-P1.3 can be used as standard digital
outputs. However, in order to do this, the Timer
2 clock must be enabled by setting the