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參數(shù)資料
| 型號： | VMX1C1020 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Versa Mix 8051 Mixed-Signal MCU |
| 中文描述： | 反之亦然混合8051混合信號微控制器 |
| 文件頁數(shù)： | 31/80頁 |
| 文件大小： | 3605K |
| 代理商： | VMX1C1020 |
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VMX51C1020
_________________________________________________________________________________________________
www.ramtron.com
page 31 of 80
Timer2 Clock Prescaler
When Timer2 is configured so that it derives its
clock source from the System Clock, the Clock
prescaling value can be controlled by software
using the T2PSM and the T2PS bit of the
T2CON register.
The different system clock prescaling values are
shown in the following table:
T2PSM
T2PS
Timer 2 input clock
1
X
SYSCLK / 2
0
0
SYSCLK / 12
0
1
SYSCLK / 24
Timer2 Count Size
Timer2 can be configured to operate in 8-bit or
16-bit formats. The T2SIZE bit of the T2CON
register selects the Timer2 count size.
o
If T2SIZE = 0, Timer2 size is 16-bits
o
If T2SIZE = 1, Timer2 size is 8-bits
Timer2 Reload Modes
The Timer2 reload mode is selected by the
T2RM1 and T2RM0 bits of the T2CON register.
The following figure shows the reload operation.
Timer2 must be configured as a 16-bit
Timer/Counter for the reload modes to be
operational by clearing the T2SIZE bit.
Timer 2 Mode 0
When the timer overflows, the T2IF overflow flag
is set. Concurrently, this overflow causes Timer2
to be reloaded with the 16-bit value contained in
the CRCx register, (which has been preset by
software). This reload operation will occur during
the same clock cycle in which T2IF was set.
Timer2 Mode 1
In Mode 1, a 16-bit reload from the CRCx
register on the falling edge of T2EX occurs. This
transition will set T2EXIF if T2EXIE is set. This
action will cause an interrupt (providing that the
Timer2 interrupt is enabled) and the T2IF flag
value will not be affected.
The value of the T2SIZE does not affect the
Reload in Mode 1. Also, the reload operation is
performed independently of the state of the
T2EXIE bit.
F
IGURE
22:
T
IMER
2
R
ELOAD
M
ODE
EXF2
T2IF
Timer 2 interrupt
request
Reload Mode 1
Reload Mode 0
T2EX
Input
Clock
Reload
Data Bus
Data Bus
TL2
TH2
Data Bus
Data Bus
CRCL
CRCH
T2EXIE
Data Latch
Data Latch
Timer2 Overflows and Interrupts
Timer2’s interrupt is enabled when the Timer2
counter, the T2IF flag is set, and a Timer 2
interrupt occurs.
A Timer2 interrupt may also be raised from
T2EX if the T2EXIE bit of the IEN1 register is
set.
Finding the exact source of a Timer2 interrupt
can be verified by checking the value of the T2IF
and the T2EXIF bits of the IRCON register.
Timer2’s interrupt vector is located at address
002Bh
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