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參數(shù)資料
| 型號： | VMX1C1020 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Versa Mix 8051 Mixed-Signal MCU |
| 中文描述： | 反之亦然混合8051混合信號微控制器 |
| 文件頁數(shù)： | 20/80頁 |
| 文件大?。?/td> | 3605K |
| 代理商： | VMX1C1020 |
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VMX51C1020
T
ABLE
29:
(MACC3)
MULT/ACCU
U
NIT
C
O
PERAND
,
H
IGH
B
YTE
-
SFR
EF
H
7
6
5
4
MACC3 [31:24]
Bit
Mnemonic
Function
Upper segment of the 32-bit addition
register
MACRES Result Register
_________________________________________________________________________________________________
www.ramtron.com
page 20 of 80
3
2
1
0
31:24
MACC3
The MACRES register, which is 32-bits wide,
contains
the
result
operation. In fact, the MACRES register is the
output of the Barrel Shifter.
T
ABLE
30:
(MACRES0)
MULT/ACCU
U
NIT
R
ESULT
,
L
OW
B
YTE
-
SFR
F4
H
7
6
5
4
MACRES0 [7:0]
Bit
Mnemonic
Function
7:0
MACRES0
Lower segment of the 32-bit
MULT/ACCU result register
T
ABLE
31:
(MACRES1)
MULT/ACCU
U
NIT
R
ESULT
,
B
YTE
1
-
SFR
F5
H
7
6
5
4
MACRES1 [15:8]
Bit
Mnemonic
Function
15:8
MACRES1
Lower middle segment of the 32-bit
MULT/ACCU result register
T
ABLE
32:
(MACRES2)
MULT/ACCU
U
NIT
R
ESULT
,
B
YTE
2
-
SFR
F6
H
7
6
5
4
MACRES2 [23:16]
Bit
Mnemonic
Function
23:16
MACRES2
Upper middle segment of the 32-bit
MULT/ACCU result register
T
ABLE
33:
(MACRES3)
MULT/ACCU
U
NIT
R
ESULT
,
H
IGH
B
YTE
-
SFR
F7
H
7
6
5
4
MACRES3 [31:24]
Bit
Mnemonic
Function
31:24
MACRES3
Upper segment of the 32-bit
MULT/ACCU result register
MACPREV Register
of
the
MULT/ACCU
3
2
1
0
3
2
1
0
3
2
1
0
3
2
1
0
The MACPREV register provides the ability to
automatically or manually save the contents of
the MACRES register and re-inject it into the
calculation. This feature is especially useful in
applications where the result of a given
operation serves as one of the operands of the
next one.
As mentioned previously, there are two ways to
load the MACPREV register controlled by the
PREVMODE bit value:
PREVMODE = 0:
Auto MACPREV load, by writing into the MACA0
register. Selected when PREVMODE = 0.
PREVMODE = 1:
Manual
load
of
MACPREV
LOADPREV bit is set to 1
A good example using the auto loading of the
MACPREV feature is the implementation of a
FIR Filter. In that specific case, it is possible to
save a total of 8 MOV operations per tap
calculation.
T
ABLE
34:
(MACPREV0)
MULT/ACCU
U
NIT
P
REVIOUS
O
PERATION
R
ESULT
,
L
OW
B
YTE
-
SFR
FC
H
7
6
5
4
MACPREV0 [7:0]
Bit
Mnemonic
Function
7:0
MACPREV0
Lower segment of 32-bit
MULT/ACCU previous result register
T
ABLE
35:
(MACPREV1)
MULT/ACCU
U
NIT
P
REVIOUS
O
PERATION
R
ESULT
,
B
YTE
1
-
SFR
FD
H
7
6
5
4
MACPREV1 [7:0]
Bit
Mnemonic
Function
15:8
MACPREV1
Lower middle segment of 32-bit
MULT/ACCU previous result register
T
ABLE
36:
(MACPREV2)
MULT/ACCU
U
NIT
P
REVIOUS
O
PERATION
R
ESULT
,
B
YTE
2
-
SFR
FE
H
7
6
5
4
MACPREV2 [15:8]
Bit
Mnemonic
Function
23:16
MACPREV2
Upper middle segment of 32-bit
MULT/ACCU previous result register
T
ABLE
37:
(MACPREV3)
MULT/ACCU
U
NIT
P
REVIOUS
O
PERATION
R
ESULT
,
H
IGH
B
YTE
-
SFR
FF
H
7
6
5
4
MACPREV3 [7:0]
Bit
Mnemonic
Function
31:24
MACPREV3
Upper segment of 32-bit
MULT/ACCU previous result register
when
the
3
2
1
0
3
2
1
0
3
2
1
0
3
2
1
0
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