參數(shù)資料
型號(hào)： PLI9080
廠商： Electronic Theatre Controls, Inc.
英文描述： PCI I/O ACCELERATOR
中文描述： 的PCI I / O加速器
文件頁(yè)數(shù)： 9/133頁(yè)
文件大?。?/td> 883K
代理商： PLI9080
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PCI 9080
PCI I/O ACCELERATOR
I
2
O COMPATIBLE PCI BUS MASTER INTERFACE CHIP
FOR ADAPTERS AND EMBEDDED SYSTEMS
FEBRUARY 28, 1997
VERSION 0.93 PRELIMINARY
PLX Technology, Inc., 1997
Page 1
Version 0.93
FEATURES
PCI Version 2.1 compliant Bus Master Interface chip
for adapters and embedded systems
I
2
O Compatible Messaging Unit
3.3 or 5 Volt PCI signaling, 5 volt core, low-power
CMOS in 208-pin PQFP
Two independent DMA channels for local bus
memory to/from PCI host bus data transfers
Eight programmable FIFOs for zero wait state burst
operation
PCI
ó
Local data transfers up to 132 MB/sec
Programmable local bus supports nonmultiplexed
32-bit address/data, multiplexed 32 or 16 bit, and
slave accesses of 32, 16, or 8 bit local bus devices
Local bus runs asynchronously to the PCI bus
Eight 32 bit mailbox and two 32 bit doorbell registers
Performs Big Endian/Little Endian conversion
Upward compatibility with PCI
9060/9060ES/9060SD
(See compatibility notes)
1. GENERAL DESCRIPTION
The PCI 9080 provides a compact, high performance
PCI bus master interface for adapter boards and
embedded systems. The programmable local bus of the
chip can be configured to directly connect a wide variety
of processors, controllers and memory subsystems.
The PCI 9080 contains an Intelligent I/O (I
2
O)
messaging unit that allows high performance and
compatible software implementations of the I
2
O bus
protocol specification. Users of the PCI 9060, 9060ES
and 9060SD chips may upgrade their products to
support I
2
O, 3.3 Volts and other new features with little
or no change to existing hardware and software.
The PCI 9080 provides two independent chaining
DMA channels with bidirectional FIFOs supporting zero
wait state burst transfers between host and local
memory. Slave transfers are performed through a third
FIFO. A fourth FIFO allows the local processor and
other controllers to perform direct bus master transfers
to the PCI bus. The PCI 9080 also allows a local
processor to configure other PCI devices in the system.
Serial
EEPROM
PCI Bus
Local Bus
CPU
Boot
ROM
Local
Memory
I/O Device
(LAN, Disk,
Video, etc.)
FIFOs
PCI 9080
Control:
- DMA
- I2O
- Unaligned
Transfer
PCI
Local
Run-Time
DMA
I2O
Registers
Local Bus Interface
PCI Interface
Figure 1-1. Typical Adapter or Block Diagram
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