參數(shù)資料
型號： PLI9080
廠商： Electronic Theatre Controls, Inc.
英文描述： PCI I/O ACCELERATOR
中文描述： 的PCI I / O加速器
文件頁數(shù)： 77/133頁
文件大小： 883K
代理商： PLI9080
SECTION 4
PCI 9080
REGISTERS
PLX Technology, Inc., 1997
Page 69
Version 0.93
Table 4-58. (INTCSR; PCI:68h, LOC:E8h) Interrupt Control/Status (continued)
24
A value of 0 indicates a Direct Master was the bus master during a Master or Target
abort. (Not valid until abort occurs.)
Yes
No
1
25
A value of 0 indicates DMA CH 0 was the bus master during a Master or Target abort.
(Not valid until abort occurs.)
Yes
No
1
26
A value of 0 indicates DMA CH 1 was the bus master during a Master or Target abort.
(Not valid until abort occurs.)
Yes
No
1
27
A value of 0 indicates a Target Abort was generated by the PCI 9080 after
256 consecutive Master retries to a Target. (Not valid until abort occurs.)
Yes
No
1
28
A value of 1 indicates the PCI wrote data to the MailBox #0. Enabled only
if MBOXINTENB is enabled (bit 3 high).
Yes
No
0
29
A value of 1 indicates the PCI wrote data to the MailBox #1. Enabled only
if MBOXINTENB is enabled (bit 3 high).
Yes
No
0
30
A value of 1 indicates the PCI wrote data to the MailBox #2. Enabled only
if MBOXINTENB is enabled (bit 3 high).
Yes
No
0
31
A value of 1 indicates the PCI wrote data to the MailBox #3. Enabled only
if MBOXINTENB is enabled (bit 3 high).
Yes
No
0
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