- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368046 > PLI9080 (Electronic Theatre Controls, Inc.) PCI I/O ACCELERATOR PDF資料下載
參數(shù)資料
| 型號： | PLI9080 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI I/O ACCELERATOR |
| 中文描述： | 的PCI I / O加速器 |
| 文件頁數(shù)： | 30/133頁 |
| 文件大?。?/td> | 883K |
| 代理商： | PLI9080 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁
SECTION 3
PCI 9080
FUNCTIONAL DESCRIPTION
PLX Technology, Inc., 1997
Page 22
Version 0.93
External bus logic can use this as a signal to perform
backoff.
A backoff cycle is device/bus architecture dependent.
External logic (arbiter) can assert the necessary signals
to cause the local master to release the local bus
(backoff). After backing off the local master, it can grant
the bus to the PCI 9080 (by asserting LHOLDA).
The PCI 9080 considers the direct master bus access
terminated when it detects LHOLDA. It then proceeds
with the PCI direct slave access. When this access is
complete and the PCI 9080 releases the local bus, the
external logic can release backoff and the local master
can resume the cycle that was interrupted by the backoff
cycle. The write FIFO of the PCI 9080 retains all the
data it has acknowledged (that is, the last data for which
READYo# was asserted and LHOLDA was not
asserted).
The Read FIFO of the PCI 9080 retains all the data read
from the PCI bus (single or burst read) and returns the
data to the Local Master when the Local Master returns
with the same request as before the backoff.
After the backoff condition ends, the local master
restarts the last cycle with ADS#. For writes, the data
following this ADS# should be the data that was not
acknowledged by the PCI 9080 prior to the backoff cycle
(that is, the last data for which READYo# was not
asserted or LHOLDA was asserted). (The PCI 9080 will
not assert the READYo# signal when the local backoff is
acknowledged, "assert LHOLDA".)
3.5.2.2.2 Software/Hardware Solution for Systems
without Backoff Capability
For adapters that do not support backoff, a possible
deadlock solution is as follows:
PCI host software, external local bus hardware, general
purpose output USERO and general purpose input
(USERI) can be used by PCI host software to prevent
deadlock. USERO can be set to request that the
external arbiter not grant the bus to any local bus master
except the PCI 9080. A status output from the local
arbiter can be connected to general purpose input
USERI to indicate that no local bus master owns the
local bus. The input can be read by the PCI host to
determine that no local bus master currently owns the
local bus. The PCI host can then do a direct slave
access. When the host is done, it clears USERO. For
devices that support preempt, USERO can be used to
preempt the current bus master device. The current
local bus master device completes its current cycle and
gives up the local bus (de-asserts LHOLD).
3.5.2.2.3 Software Solutions to Deadlock
PCI host software and local bus software can use a
combination of mailbox registers, doorbell registers,
interrupts, direct local to PCI accesses and direct PCI to
local accesses to avoid deadlock.
3.5.2.3 Direct Slave Lock
The PCI 9080 supports direct PCI to local bus exclusive
accesses (locked atomic operations). A PCI locked
operation to local bus results in the entire address
space 0, space 1 and expansion ROM space being
locked until they are released by the PCI bus master.
The PCI 9080 asserts LLOCKo# during the first clock of
an atomic operation (address cycle) and de-asserts it a
minimum of one clock, following the last bus access for
the atomic operation. LLOCKo# is de-asserted after the
PCI 9080 detects PCI FRAME# and PCI LOCK# de-
asserted at the same time. Refer to the timing diagrams
in Section 8, “
Timing Diagrams
.” Locked operations are
enabled or disabled with the Local Bus Region
Descriptor for PCI to Local Accesses Register.
It is the responsibility of external arbitration logic to
monitor the LLOCKo# pin and enforce the meaning for
an atomic operation. For example, if a local master
initiates a locked operation, the local arbiter may choose
to not grant use of the local bus to other masters until
the locked operation is complete.
3.5.3 Direct Slave Priority
Direct Slave accesses have higher priority than DMA
accesses.
Direct Slave accesses preempt DMA transfers. When
the PCI 9080 DMA controller owns the local bus, its
LHOLD output and LHOLDA input are asserted and its
LDSHOLD output is de-asserted. When a Direct Slave
access occurs, the PCI 9080 gives up the local bus
within two Lword transfers by de-asserting LHOLD and
floating its local bus outputs. After the PCI 9080
samples its LHOLDA input de-asserted, it requests the
local bus for a Direct Slave transfer by asserting LHOLD
and LDSHOLD. When the PCI 9080 receives LHOLDA,
it drives the bus and performs the Direct Slave transfer.
Upon completion of the Direct Slave transfer, the PCI
9080 gives up the local bus by de-asserting both LHOLD
and LDSHOLD and floating its local bus outputs. After
the PCI 9080 samples its LHOLDA de-asserted and its
local pause timer is zero, it requests the local bus for a
DMA transfer by re-asserting LHOLD. When it receives
LHOLDA, it drives the bus and continues with the DMA
transfer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PLL0210A | PHASE LOCKED LOOP |
| PLL0210A | PHASE LOCKED LOOP |
| PLL0305A | Serial-Input Frequency Synthesizer |
| PLL1045A | Phase-Locked Loop |
| PLL1070A | PHASE LOCKED LOOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLI-A10 | 制造商:Banner Engineering 功能描述:Plastic Fiber Convergent, Core Dia.: 0.5 mm & 9 x 0.25 mm, Fiber Length 2 m, Le |
| PLIC/DUSB_PHY/AA | 制造商:PLDA 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature) |
| PLIC/DUSB_PHY/XX | 制造商:PLD Applications Inc 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature) 制造商:PLDA 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature) |
| PLIC/EZDMA/X8/GEN1/XX | 制造商:PLD Applications Inc 功能描述:PERMANENT ENCRYPTED LICENSE FOR A X1/X4/X8 PCIE EZDMA IP - Virtual or Non-Physical Inventory (Software & Literature) |
| PLIC/LITE/X8/GEN1/XX | 制造商:PLD Applications Inc 功能描述:PERMANENT ENCRYPTED LICENSE FOR A X1/X4/X8 PCI EXPRESS IP C - Virtual or Non-Physical Inventory (Software & Literature) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。