參數(shù)資料
型號(hào)： PLI9080
廠商： Electronic Theatre Controls, Inc.
英文描述： PCI I/O ACCELERATOR
中文描述： 的PCI I / O加速器
文件頁(yè)數(shù)： 60/133頁(yè)
文件大?。?/td> 883K
代理商： PLI9080
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SECTION 4
PCI 9080
REGISTERS
PLX Technology, Inc., 1997
Page 52
Version 0.93
4.3.9 (PCIBAR0; PCI:10h, LOC:10h) PCI Base Address Register for Memory Accesses to
Local, Runtime, and DMA Registers
Table 4-19. (PCIBAR0; PCI:10h, LOC:10h) PCI Base Address Register for Memory Accesses to Local, Runtime,
and DMA Registers
Field
Description
Read
Write
Value after Reset
0
Memory Space Indicator. A value of 0 indicates the register maps into memory space.
A value of 1 indicates the register maps into I/O space.
Note: Hardcoded to 0.
Yes
No
0
2:1
Location of Register. Location values:
00—Locate anywhere in 32 bit memory address space
01—Locate below 1 MB memory address space
10—Locate anywhere in 64 bit memory address space
11—Reserved
Note: Hardcoded to 0.
Yes
No
0
3
Prefetchable. A value of 1 indicates there are no side effects on reads. This bit has no
effect on the operation of the PCI 9080.
Note: Hardcoded to 0.
Yes
No
0
7:4
Memory Base Address. Memory base address for access to Local, Runtime and DMA
registers (default is 256 bytes).
Note: Hardcoded to 0.
Yes
No
0
31:8
Memory Base Address. Memory base address for access to Local, Runtime and DMA
registers.
Yes
Yes
0
Note: For I
2
O, the Inbound message frame pool must reside in the address space pointed to by PCIBAR0. The Message
Frame Address (MFA) is defined by I
2
O as the offset from this base address to the start of the message frame.
4.3.10 (PCIBAR1; PCI:14h, LOC:14h) PCI Base Address Register for I/O Accesses to Local,
Runtime, and DMA Registers
Table 4-20. (PCIBAR1; PCI:14h, LOC:14h) PCI Base Address Register for I/O Accesses to Local, Runtime, and
DMA Registers
Field
Description
Read
Write
Value after Reset
0
Memory Space Indicator. A value of 0 indicates the register maps into memory space.
A value of 1 indicates the register maps into I/O space.
Note: Hardcoded to 1.
Yes
No
1
1
Reserved.
Yes
No
0
7:2
I/O Base Address. Base Address for I/O access to Local, Runtime and DMA registers.
(Default is 256 bytes)
Note: Hardcoded to 0.
Yes
No
0
31:8
I/O Base Address. Base Address for I/O access to Local, Runtime and DMA registers.
Yes
Yes
0
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