參數(shù)資料
型號： PLI9080
廠商： Electronic Theatre Controls, Inc.
英文描述： PCI I/O ACCELERATOR
中文描述： 的PCI I / O加速器
文件頁數(shù)： 33/133頁
文件大?。?/td> 883K
代理商： PLI9080
SECTION 3
PCI 9080
FUNCTIONAL DESCRIPTION
PLX Technology, Inc., 1997
Page 25
Version 0.93
3.6.3 DMA Data Transfers
The PCI 9080 DMA controller can be programmed to transfer data from the local bus side to the PCI bus side or from the
PCI bus side to the local bus side. Refer to Figure 3-9 and Figure 3-12 for a description of the operation.
3.6.3.1 Local to PCI Bus DMA Transfer
Local Bus Arbitration:
PCI Bus Arbitration:
Releases control of the PCI bus
whenever the FIFO becomes empty,
the PCI latency timer expires and
PCI GRANT de-asserts, a PCI
Disconnect is received, or a Direct
Local to PCI request is pending.
Rearbitrates for control of the PCI bus
when the preprogrammed number of
entries in the FIFO becomes available,
or after two PCI clocks if a disconnect
was received.
PCI
Arbitration
Local Bus
Arbitration
FIFO
Unload FIFO with
PCI Bus
Write Cycles
Load FIFO with
Local Bus
Read Cycles
GNT# REQ# LHOLDA LHOLD
Chaining Mode Descriptors:
At the start of each block transfer, in
Chaining mode only, loads the DMA
Registers by reading four Lwords
from the address specified in the Next
Descriptor Pointer Register.
Chaining Mode Descriptors:
At the start of each block transfer, in
Chaining mode only, loads the DMA
Registers by reading four Lwords
from the address specified in the Next
Descriptor Pointer Register.
Local Interrupt Generation
(Programmable)
Done
Chaining: Terminal
Count for Current
Descriptor
PCI Interrupt Generation
(Programmable)
Done
Chaining: Terminal
Count for Current
Descriptor
Releases control of the local bus whenever
the FIFO becomes full, terminal count is
reached, the local latency timer expires,
the BREQ input is asserted, or a Direct
PCI to Local Bus request is pending.
Rearbitrates for control of the local bus
when the preprogrammed number of
empty entries in the FIFO becomes
available. If the latency timer has expired,
waits until the pause timer expires.
Figure 3-9. Local to PCI Bus DMA Data Transfer Operation
相關(guān)PDF資料
PDF描述
PLL0210A PHASE LOCKED LOOP
PLL0210A PHASE LOCKED LOOP
PLL0305A Serial-Input Frequency Synthesizer
PLL1045A Phase-Locked Loop
PLL1070A PHASE LOCKED LOOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PLI-A10 制造商:Banner Engineering 功能描述:Plastic Fiber Convergent, Core Dia.: 0.5 mm & 9 x 0.25 mm, Fiber Length 2 m, Le
PLIC/DUSB_PHY/AA 制造商:PLDA 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature)
PLIC/DUSB_PHY/XX 制造商:PLD Applications Inc 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature) 制造商:PLDA 功能描述:PROJECT ENCRYPTED LICENSE FOR A SUPERSPEED USB DEVICE CONTR - Virtual or Non-Physical Inventory (Software & Literature)
PLIC/EZDMA/X8/GEN1/XX 制造商:PLD Applications Inc 功能描述:PERMANENT ENCRYPTED LICENSE FOR A X1/X4/X8 PCIE EZDMA IP - Virtual or Non-Physical Inventory (Software & Literature)
PLIC/LITE/X8/GEN1/XX 制造商:PLD Applications Inc 功能描述:PERMANENT ENCRYPTED LICENSE FOR A X1/X4/X8 PCI EXPRESS IP C - Virtual or Non-Physical Inventory (Software & Literature)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*