參數(shù)資料
型號: PLI9080
廠商: Electronic Theatre Controls, Inc.
英文描述: PCI I/O ACCELERATOR
中文描述: 的PCI I / O加速器
文件頁數(shù): 44/133頁
文件大?。?/td> 883K
代理商: PLI9080
SECTION 4
PCI 9080
REGISTERS
PLX Technology, Inc., 1997
Page 36
Version 0.93
4. REGISTERS
4.1 NEW REGISTER DEFINITIONS SUMMARY
Refer to the descriptions in the following sections for a full explanation.
Table 4-1. New Registers Definitions Summary
PCI
Offset
Local
Offset
Register
Bits
Description
08h or ACh
88h or 12Ch
LARBR
23
Add PCIREQMODE output.
28
Cached read mode.
18h
98h
LBRD0
15
Single read mode removed.
28h
A8h
DMPBAM
10
Extend almost full flag to five bits (fifth bit not contiguous).
11
Add CDMPFLIMIT output; do not prefetch past 4 K boundary for DM.
12, 3
Direct master read prefetch size control.
13
I/O Remap select.
15:14
Direct master write delay.
30h
B0h
OPLFIS
all
New outbound post list FIFO interrupt status register.
34h
B4h
OPLFIM
all
New outbound post List FIFO interrupt mask register.
40h
N/A
IQP
all
New inbound queue port register.
44h
N/A
OQP
all
New outbound queue port register.
68h
E8h
INTCSR
4
Move DMA0INTSEL output to DMAMODE0. Change to reserved.
5
Move DMA1INTSEL output to DMAMODE1. Change to reserved.
3
Mailbox interrupt enable on SD, not on 9060.
31:28
Mailbox interrupts on SD, not on 9060.
80h
100h
DMAMODE0
16
Clear byte count in chaining descriptor.
17
Add C0_INTSEL output. 0=local int., 1=PCI int.
94h
114h
DMAMODE1
16
Clear byte count in chaining descriptor.
17
Add C1_INTSEL output. 0=local int., 1=PCI int.
C0h
140h
MQCR
all
New messaging queue configuration register.
C4h
144h
QBAR
all
New queue base address register.
C8h
148h
IFHPR
all
New inbound free head pointer.
CCh
14Ch
IFTPR
all
New inbound free tail pointer.
D0h
150h
IPHPR
all
New inbound post head pointer.
D4h
154h
IPTPR
all
New inbound post tail pointer.
D8h
158h
OFHPR
all
New outbound free head pointer.
DCh
15Ch
OFTPR
all
New outbound free tail pointer.
E0h
160h
OPHPR
all
New outbound post head pointer.
E4h
164h
OPTPR
all
New outbound post tail pointer.
E8h
168h
QSR
all
New I
2
O queue status register.
F0h
170h
LAS1RR
all
New Local Address Space 1 Range Register for PCI to local.
F4h
174h
LAS1BA
all
New Local Address Space 1 Local Base Address (Remap).
F8h
178h
LBRD1
all
New Local Address Space 1 Bus Region Descriptor.
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