Signal Descriptions
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
19-11
Table 19-2 presents signal names, functions, and descriptions sorted by pin numbers.
Table 19-2. Signal Name and Description by Pin Number (Sheet 1 of 8)
Map
BGA
Pin
Pin Functions
Name
Description
I/O
0 (Reset)
1
2
3
A1
DDATA3
—
DDATA3
Debug data 3
O
A2
DDATA1
—
DDATA1
Debug data 1
O
A3
TEA
—
TEA
BDM debug transfer error
acknowledge
I
A4
TDI
DSI
—
TDI/DSI
JTAG test data in/BDM
data in
I
A5
D16
D0
—
D16/D0
I/O
A6
D18
D2
—
D18/D2
I/O
A7
D21
D5
—
D21/D5
I/O
A8
D22
D6
—
D22/D6
I/O
A9
BS0
—
BS0
Byte strobe 0
O
A10
RAS0
—
RAS0
SDRAM row select strobe
O
A11
A13
SDA12
SDA11
—
A13/SDA12/SDA11
A13/SDRAM-16bit
A12/SDRAM-32bit A11
O
A12
A2
SDA1
SDA0
—
A2/SDA1/SDA0
A2/SDRAM-16bit
A1/SDRAM-32bit A0
O
A13
A3
SDA2
SDA1
—
A3/SDA2/SDA1
A3/SDRAM-16bit
A2/SDRAM-32bit A1
O
A14
A4
SDA3
SDA2
—
A4/SDA3/SDA2
A4/SDRAM-16bit
A3/SDRAM-32bit A2
O
B1
PST0
—
PST0
Internal processor status
0
O
B2
DDATA2
—
DDATA2
Debug data 2
O
B3
MTMOD
—
MTMOD
0 selects JTAG mode, 1
selects BDM mode
I
B4
TMS
BKPT
—
TMS/BKPT
JTAG test mode/BDM
select breakpoint input
I
B5
A20
—
A20
O
B6
D17
D1
—
D17/D1
I/O
B7
D20
D4
—
D20/D4
I/O
B8
D23
D7
—
D23/D7
I/O
B9
SDWE
—
SDWE
SDRAM write enable
O
B10
SDCS/
CS7
—
SDCS / CS7
SDRAM chip select/CS7
O
B11
A12
SDA11
—
A12/SDA11
A12/SDRAM-16bit A11
O